1 Reply Latest reply on Feb 11, 2020 10:11 PM by RaktimR_11

    CY8C6247 SDIO documentation confusion




      I'm working on a new design using the CY8CKIT-062-WiFi-BT as a reference. I've noticed with this chip that it's using pins P2_0 to P2_5 as an SDIO interface for the onboard WiFi module. Looking at the documentation however I'm confused as to how these pins are configured. The datasheet makes no mention of SDHC support, and the architecture technical reference manual has one reference in the errata to an SDHC chapter that looks like it no longer exists. The table at this link https://www.cypress.com/documentation/datasheets/psoc-6-mcu-cy8c62x6-cy8c62x7-datasheet also says that there is no SDHC support.


      What exactly is happening on this development board? From available documentation it looks like there is SDHC support, however the development board does appear to work.