1 Reply Latest reply on Jan 30, 2020 11:03 PM by GaneshD_41

    EFT protection in I2C lines

    PrN_4452166

      Hi Team,

      we are working on EFT testing, we have seen your EFT document

      https://www.cypress.com/file/138636/download.

       

      In the document, they have given protection for I2C lines by giving series resistance and Parallel capacitor.

       

       

      Even though we use lower values. The Pullup voltage will be reduced to 0.1V it's not good in I2C lines.

       

      How can I protect the I2C lines? when we had series resistance it acts as a voltage divider.

       

      so, How can I choose the resistor values?

       

      Thanks

      Praveen

       

       

        • 1. Re: EFT protection in I2C lines
          GaneshD_41

          Hi,

           

          >>"so, How can I choose the resistor values?"

          -->You can go through the following video which explains how to select resistance values on I2C lines.

           

          https://www.youtube.com/watch?v=sGZe0aJsqBQ

           

          >>"The Pullup voltage will be reduced to 0.1V it's not good in I2C lines."

          --> This should not happen because the internal drive modes for I2C pins is Open Drain Drives Low.

           

          >>"How can I protect the I2C lines? when we had series resistance it acts as a voltage divider."

          -->Please check the pin configuration once again if you modified it. Also we recommed you to place the series resistances after the pull-up resistances.

           

          Thanks

          Ganesh