Interfacing with an LTC2324 ADC

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RiTa_288331
Level 2
Level 2
10 replies posted 10 questions asked 5 replies posted

We are looking to interface a PSOC 6 to an LTC2324-16 ADC (16 bit conversions) with a PSOC6.  The LTC2324 is a 4 channel, simultaneously sampled ADC, with an SPI interface (each ADC conversion is a 64-bit transaction).  However, to increase throughput, there are 4 simultaneous MISO outputs (slave to master data).  In this way, the ADC can send out data 4 times as fast (I.E. it has 4 "MISO lanes" to get the data out faster [4 outputs, each stream is 16 bits], as opposed to a conventional single MISO that 4 ADC results are daisy-chained to [1 output stream at 64 bits]).

Normally, stock PSOC components do not support this 4-lane MISO interface.  In order to interface this custom ADC to a PSOC6, I was going to use a regular SPI master interface with no MISO pin, and then I will make 4 digital input pins with a shift register behind each pin:

(15 D-type flip-flops per input stream) X (4 inputs) = 60 flip-flops

All flip-flops would share the common clock generated from the LTC2324.  I would then use Status registers (8 bits per status register --> 8 of them needed to read all 64 ADC bits) to get all 4 ADC results into the firmware.

--> Before I get too deep in the weeds, would this approach work?  Am I missing something?

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BragadeeshV
Moderator
Moderator
Moderator
First question asked 1000 replies posted 750 replies posted

Hi RiTa_288331​,

The SPI block in PSoC can support 64 clock cycles transaction with each data width as 16 bits.  If you need 4 MISO inputs you may have to create a custom component as you rightly said. Please note that the SPI master of PSoC can operate at a maximum of 25 Mbps (SCK).  Choose a PSoC 6 part that has UDBs in it so that you can implement your custom component in hardware.

References:

PSoC® Creator™ Component Author Guide

https://www.cypress.com/file/137436/download

Universal Digital Block (UDB) Editor Guide

https://www.cypress.com/file/139386/download

Regards,

Bragadeesh

Regards,
Bragadeesh

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1 Reply
BragadeeshV
Moderator
Moderator
Moderator
First question asked 1000 replies posted 750 replies posted

Hi RiTa_288331​,

The SPI block in PSoC can support 64 clock cycles transaction with each data width as 16 bits.  If you need 4 MISO inputs you may have to create a custom component as you rightly said. Please note that the SPI master of PSoC can operate at a maximum of 25 Mbps (SCK).  Choose a PSoC 6 part that has UDBs in it so that you can implement your custom component in hardware.

References:

PSoC® Creator™ Component Author Guide

https://www.cypress.com/file/137436/download

Universal Digital Block (UDB) Editor Guide

https://www.cypress.com/file/139386/download

Regards,

Bragadeesh

Regards,
Bragadeesh