2 Replies Latest reply on Jan 21, 2020 6:24 AM by JoLE_3168931

    Full duplex I2S with PSOC 6 2M (CY8CPROTO-062-4343W)




      we are currently trying to port an audio WICED application running on 43907 to the CY8CPROTO-062-4343W board and Modustoolbox 2.0.

      While the Wi-Fi part could be easily adapted, the audio part is more tricky.

      The application handles full duplex audio streams through an I2S port, and unfortunately PSOC 6 SDK has no high level audio driver managing the transfer of audio periods, unlike WICED.


      I just looked to port the PSOC 6 audio driver from WICED (WICED\platform\MCU\PSoC6\peripherals\platform_i2s.c, for PSOC 6 1M) but I found two annoying things:




           * The I2S block consists of two sub-blocks:

           * I2S Transmit (Tx) block: word select (tx_ws), clock (tx_sck) and data (tx_sdo) output signals.

           * I2S Receive (Rx) block: word select (rx_ws), clock (rx_sck) and data (rx_sdi) input signals.

           * When PSoC6 is driving both TX and RX as I2S Master, the TX and RX clock lines can be out of sync.

           * If the TX/RX clock lines are connected together to an audio codec, it may not be able to output audio.

           * In such settings, simultaneous RX and TX (full duplex I2S) audio can be achieved as follows:

           * I2S transmitter is in slave mode.

           * I2S receiver is in master mode.

           * (Also note that AC spec. should be satisfied at the PSoC6 pin in order to function correctly)



      B) The copy of the audio data seems to not be performed with DMA at all, the CPU inserts each sample one at a time in the I2S FIFO:


      static void service_transfer_complete( platform_i2s_direction_t dir )



          if ( num_samples > 0 )


              samples = (uint16_t*)(&(stream->audio_buffer_ptr[stream->position + stream->data_index]));


              if ( dir == PLATFORM_I2S_WRITE )


                  length = (num_samples < (I2S_TX_FIFO_SIZE - I2S_TX_FIFO_TRG_LVL)) ? num_samples : (I2S_TX_FIFO_SIZE - I2S_TX_FIFO_TRG_LVL);


                  while ( length > 0 )


                      Cy_I2S_WriteTxData( i2s_base, (uint32_t)(*samples) );




                      stream->data_index += 2;




      Does these limitations still apply to the PSOC 6 2M (found on the CY8CPROTO-062-4343W board) ?


      If not, could you provide a code example to manage full duplex I2S with DMA transfers, and a higher level API than I2S PDL for PSOC 6 2M ?


      Thank you.