1 Reply Latest reply on Jan 12, 2020 11:15 PM by GaneshD_41

    PSOC4100PS MPU


      Hello Guys,


      Looking at arm documentation MPU feature and un/privileged fw excecution is optional on cortex m0+ while reading cypress docs i've found two scenarios:

      - From datasheet point of view there is no mention to this functionality

      - From trm perspective the core have "Design time configurable MPU" and supports unprivileged and privileged mode execution.


      So, my questions are:

      - does these features implemented in psoc4100ps?

      - What "Design time configurable MPU" mean?

        Only Cypress can change MPU behavour???


      Thank you



        • 1. Re: PSOC4100PS MPU



          >>" does these features implemented in psoc4100ps?"

          Cypress--> The device family PSoC 4100S plus supports MPU. Its features are iplemented in this chip.


          >>"- What "Design time configurable MPU" mean?"

          Cypress--> We need to check with our design team regarding this statement. However you can use the complete features of MPU in your application.


          The features of MPU are present in section 4-5 of the ARM Cortex M0+ generic user guide from the link below:




          You can see the CMSIS implementation of the MPU registers in the "core_cm0plus.h" file of the PSoC Creator project source code.