4 Replies Latest reply on Jan 13, 2020 3:03 AM by PrSe_4406351

    CY8C4125 SPI transmission sending the data twice

    PrSe_4406351

      Hello,

             I am using CY8C4125 for the first time. I am facing a problem in SPI slave mode. When i write the TX-FIFO, it got transmitted twice with same value. i used the sample code only for testing with little modifications to send different values(increment the reply). Surprisingly, dummy bytes transmitted in-between. Anybody having the same issue? Even i tried clearing Tx buffer before writing the FIFO. Please find the below is Aardvark log. Attached is the project. Please help me to correct this transmission issue.

       

      TimeModuleRead/WriteMaster/SlaveFeaturesBitrateAddressLengthData
      2020-01-08 15:21:36.598"SPIWMRSML4000301 01 17
      21:36.6SPIRMRSML4000300 FF 0BJunk data since it is first request
      21:40.3SPIWMRSML4000301 01 17
      21:40.3SPIRMRSML4000301 00 17Reply 00
      21:44.0SPIWMRSML4000301 01 17
      21:44.0SPIRMRSML40003FF FF FFReply with dummy
      21:46.9SPIWMRSML4000301 01 17
      21:46.9SPIRMRSML4000301 00 17Reply again with 00. which suppose to be 01
      21:53.6SPIWMRSML4000301 01 17
      21:53.6SPIRMRSML40003FF FF FF
      21:55.1SPIWMRSML4000301 01 17
      21:55.1SPIRMRSML4000301 01 17
        • 1. Re: CY8C4125 SPI transmission sending the data twice
          GrCa_1363456

          It's nice to have the examples available from Cypress.

          I took a look at the code and compared it to the SPI Interrupt examples.

           

          Some base information about the SPI interface: The SPI Master initiates each transaction on the SPI bus. Data is valid on both Read and Write (MISI and MISO) for every transaction. Holding the data line high to produce all FF’s produces an ignored message.

           

          It appears the code that was attached is a modified version of Cypress Code Example CE224463 – PSoC SPI Slave 

          I’m guessing the interaction is with  another Cypress kit setup as a SPI Master using Cypress’ Code Example CE224339 – PSoC SPI Master

           

          Valid data is initiated on both ends with a Start of Packet (SOP) of 01 and terminated with an End of Packet (EOP) of 17. All messages are three bytes long in this Code Example. The receiving side checks for expected SOP=01 and EOP=17 before accepting the data. The middle byte is the data.

           

          The SPI Master is expecting a status of STS_CMD_DONE = 07 from the slave after sending it a command.

          Since the SPI Master doesn’t receive a 07, it continues to send the same command until an 07 appears within a valid packet.

          The modified main.c code, which appears to be based on CE224463, changes the response from an 07 to an incrementing value.

          When the response loops to 07, the Master does then increment to the next command.

           

          I recommend setting the variable “status” within the “ExecuteCommand” function to 07 or back to STS_CMD_DONE when the slave is ready for the next command, rather than incrementing it. Alternatively, change the master code to accept the incrementing status.

          I also recommend setting “status” back to a local. In the modified code, “status” is  defined as both a global to main.c and a local to individual functions then passed back from ExecuteCommand.

           

          I hope this response provides some insight.

          Greg

          • 2. Re: CY8C4125 SPI transmission sending the data twice
            PrSe_4406351

            Hello Greg,

                   Thanks for the quick reply.I missed to update about the master. Sorry for the confusion. As you said i have used  Cypress Code Example CE224463 – PSoC SPI Slave for slave side. But in master side i am just using Aardvark as Master. So i am not expecting STS_CMD_DONE on the master side. Expecting a count increment for each telegram it receives. status byte is increment on each telegram it receives. But it is transmitted two times. Refer the Aardvark log below

            I even used SPI_1_SpiUartClearTxBuffer() before the SPI_1_SpiUartPutArray(). But still the same data is transmitted twice. I tried to use Tx-FIFO empty interrupt for clearing the FIFO after transmit over. But still it is transmitted twice.

             

            Hope i have clearly explained the expectation and issue now

             

            Thanks,

            Pratap

            • 3. Re: CY8C4125 SPI transmission sending the data twice
              AshishS_66

              Hi Pratap,

               

              From the attached project file, we noticed that the data rate set for the SPI slave component is 1Mbps while in the Aardvark analyzer you have set the bitrate to 4Mbps. We used your project and set 1Mbps in the Analyser, we did not get any issue. So, can you please change this to 1Mbps and recheck and let us know what you observe ?

               

               

              Capture_aardvark_log_spi.png

               

              Best Regards,

              Ashish

              • 4. Re: CY8C4125 SPI transmission sending the data twice
                PrSe_4406351

                Hello Ashish,         Thanks for quick analysis and report. I have overlooked the issue. I can see it is working correctly on my side. So even the Slave is using Master clock, it has limited data rate based on internal clock. Thanks. we can close this issue. Thanks & Regards, S.Pratap