3 Replies Latest reply on Jan 8, 2020 5:44 PM by MoTa_728816

    Can't get clocked Status Register to work?

    RoAl_1309171

      Hi,

       

      I'm new to PSoC and I'm having trouble getting the Status Register to work with a clock.

       

      I'm interfacing a CY8CKIT-059 to a 6502 microprocessor. The way the 6502 accesses memory is that it sets the address lines and the R/~W signal, then about 225ns later, it raises the ph2 clock. For a memory read, the memory (in my case the PSoC) should read the address and put the data on the data bus. About 500ns after that, the ph2 clock goes low. On a memory write, that's when the memory (in my case the PSoC) should capture the data that the 6502 put on the bus.

       

      I have Status Registers that capture the address lines and the 6502's data output. (Actually, my schematic converts the 16 bit 6502 address into a 32 bit PSoC memory location, and that's what goes into the Status Registers. There's 225ns between the address being valid and the ph2 going high, so my schematic's logic has plenty of time to work.) If I make my registers transparent, the firmware can read the address correctly. But if I make them sticky, clocked by ph2 (after it's passed through an asynchronous UDBClkEn), the firmware reads zero for the address.

       

      What am I doing wrong (my project is attached)?

       

      Thank you,

        Bob

        • 1. Re: Can't get clocked Status Register to work?
          MoTa_728816

          Dear Bob-san,

           

          According to the Datasheet of Status Register,

          ==================

          Sticky – Goes high on the rising edge of the Clock (if the status input signal is high). It

          goes low after the Status register is read.

          ==================

           

          If we read the value of Sticky bit, the value goes to low = 0.

           

          Since your project seems to be very complicated to me,

          I made a simple test project with following schematic with CY8CKIT-059.

          001-schematic.JPG

          When I ran the program, the Tera Term log was

          000-TeraTerm-log.JPG

          The values are from left to right

          clock

          address bit (input)

          value of transparent Status Reg

          value of Sticky Status Reg

           

          It seems that the transparent value change immediately with the input,

          but Sticky bit value change only after the clock raises.

          Meantime, after reading the value of the Sticky bit returned to 0.

           

          So I imagine that

          (1) every time ReadMemory_Status block is executed, the AddressByte0 value returns to 0

          (2) Since both AddressByte0 and ReadMemory are clocked by ph2Clk

              the program may read value before AddressByte0 finishes updating the value.

           

          If my assumption is correct, delaying the clock to ReadMemory a few cycles by using DFF or something may fix the problem.

          And if my assumption is not correct, I'm sorry for wasting your time.

           

          Best Regards,

          8-Jan-2020

          Motoo Tanaka

          • 2. Re: Can't get clocked Status Register to work?
            RoAl_1309171

            Thank you Motoo. But I don't see how reading the ReadMemory SR would cause the AddressByte0 SR to clear.

             

            - Bob

            • 3. Re: Can't get clocked Status Register to work?
              MoTa_728816

              Dear Bob-san,

               

              > But I don't see how reading the ReadMemory SR would cause the AddressByte0 SR to clear.

              It's reading AddressByte0 which clears the AddressByte0's sticky bit.

               

              So I think that when next line is called, the sticky bit(s) of AddressByte0 SR are cleared.

                          DataOut_Control = *(uint8_t *) (*(reg32 *) AddressByte0_Status_PTR);

               

              Best Regards,

              9-Jan-2020

              Motoo Tanaka

              P.S. attached is the datasheet of Status_Reg, please refer to the page 3, Mode > Sticky (Clear on Read)