1 Reply Latest reply on Jan 5, 2020 5:25 PM by HirotakaT_91

    How to detect USB connection and disconnection on FPGA side


      I have a question about the following system configuration.
      [System  block]
      FPGA - CY7C65215-32LTXIT - <USB cable> - HOST PC

      They are thinking that they want to detect connection and disconnection on FPGA side when USB host is connected in CY7C65215.
      I think it is necessary to detect the signal from CY7C65215 on the FPGA side. but  please tell me about specific examples, and the mechanism.


      Best Regards


        • 1. Re: How to detect USB connection and disconnection on FPGA side

          By sending a WAKEUP signal from MCU (FPGA as well), CY7C65215 is waken up from suspend state, which in turn issues a remote wakeup to the USB host. It is mentioned in our datasheet.

          Otherwise, simply monitor the CY7C65215's VBUS pin voltage and XRES (if used) so as to detect the USB connection.


          If these things do not meet the customer's requirement, kindly let me know which feature of CY7C65215 will they use? UART, I2C, or SPI? Master or Slave? Self-powered or Bus-powered? Since they use CY7C65215, will they use dual channel? Do they have to detect USB connection with exact timing?


          Best regards,

          Hirotaka Takayama