9 Replies Latest reply on Sep 9, 2020 12:50 PM by BoTa_264741

    RMS measurement using window function


      Attached below is a demo project showing RMS (Root Mean Square) measurement using weighting function technique. In such approach ADC is continuously sampling the signal, and RMS is calculated over finite interval of ~10 AC periods using a weighted window. This simple approach works if signal frequency variations are within pre-defined range, and high output rate is not needed. It can work for non-demanding application such as 50-60 Hz AC monitoring.


      The idea is illustrated on Chart 1.


      Chart 1. Calculated AC signal, signal squared, weighting window and their product.


      AC signal simulated by the Cosine (10 periods), and weighting function by the Gaussian, calculated over 1001 points (1000 intervals).

      Cosine = cos( 2 * PI * Freq *  X ); Gauss = exp( -(X^2 / (2 * sigma^2) ), and where Freq = 10 and sigma = 250. The pseudocode is provided here:

      Re: bounces happened at comparator output

      Despite the weighting function here is being clipped, the calculated RMS = 0.707106 matches theoretical value sqrt(1/2).


      The project uses double-buffering technique. The incoming AC signal is continuously sampled using PSoC5 DeltaSigma ADC (16-bit) and transferred to the ring Buffer in RAM by DMA. Once half of Buffer is filled, the interrupt is fired requesting data processing, while DMA continues to populate the Buffer in the background. RMS update frequency is defined by the size of the Buffer and ADC sampling rate. ADC sampling rate determines amount of harmonics captured, thus the accuracy of the measurements. Note that this approach does not require synchronizing the ADC sampling clock and AC signal, which makes it very simple and portable to PSoC4 and PSoC6.


      Data below shown for ADC sampling rate of 2 kHz and Buffer size of 2x401 samples. Resulting RMS update rate was approx. 5 Hz. Project was also tested using other parameters: ADC-1, 2, 4, 8 kHz, 1/2 Buffer size - 201, 401 and 801 samples.


      Project includes optional arbitrary signal generator, which can be safely removed if external signal generator is available. It requires following custom components:

      *   DDS32 v0.0                  : Arbitrary frequency DDS generator. https://community.cypress.com/message/158566#158566

      *   WaveGen8 v0.0 (beta) : Arbitrary shape wave generator (included into this project)

      *   QuadDec_SW v0.1      : Quad decoder w/button switch. https://community.cypress.com/thread/30654


      Other optional custom component used in the project:

      *   PSoC Annotation Library v1.0: https://community.cypress.com/message/204321

      *   StopWatch v0.0 (beta)  : Timer for code profiling (included into this project)


      Also attached a stripped down version of the project (without signal generator and other external components). This may help if external signal generator is available.        



      Figure 1. Project schematic.


      Figure 2. Project timing diagram


      Figure 3. Optional arbitrary signal generator.


      Figure 4. KIT-059 Circuit diagram using PSoC Annotation Library v1.0.


      Figure 5. Yellow trace - AC signal input; Cyan - signal reference; Fuchsia - RMS voltage output.


      Figure 6. UART terminal output.