PSoC 4 Schematics

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NaJa_4363881
Level 3
Level 3
10 replies posted 10 questions asked 5 replies posted

Hello!

I am working on a prototype for the PSoC 4 device (CY8C4014FNI-421AT). Due to the smaller BGA spacing (0.35 BSC) of the WLCSP package, I thought of reaching out here to verify whether the modifications made to the device connectivity affect its functionality.

It will be great if someone could review and advise me on any corrections to the attached image.

Thanks and Regards,

Nandhini Jayapandian

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MotooTanaka
Level 9
Level 9
Distributor - Marubun (Japan)
First comment on blog Beta tester First comment on KBA

Dear Nandhini-san,

To me, if you are using unregulated external power supply connecting VCCD and VDD does not seem to be correct.

If you are providing regulated power it will be fine.

(See Page 6 and 7 of following AN)

I'd suggest you to download "PSoC Hardware Design Considerations - AN88619" and review it.

At the last part of the AN,  there is an Appendix-C which is "Schematic Checklist".

https://www.cypress.com/documentation/application-notes/an88619-psoc-4-hardware-design-consideration...

Best Regards,

18-Dec-2019

Motoo Tanaka

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MotooTanaka
Level 9
Level 9
Distributor - Marubun (Japan)
First comment on blog Beta tester First comment on KBA

Dear Nandhini-san,

To me, if you are using unregulated external power supply connecting VCCD and VDD does not seem to be correct.

If you are providing regulated power it will be fine.

(See Page 6 and 7 of following AN)

I'd suggest you to download "PSoC Hardware Design Considerations - AN88619" and review it.

At the last part of the AN,  there is an Appendix-C which is "Schematic Checklist".

https://www.cypress.com/documentation/application-notes/an88619-psoc-4-hardware-design-consideration...

Best Regards,

18-Dec-2019

Motoo Tanaka

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