Please refer to the attached link for KBA : Increasing Frequency of Bit-Banged GPIO Clock in EZ-USB® FX3™ - KBA90267
Please use cyfxusbspigpiomode found in the SDK example path: C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\firmware\serialif_examples\cyfxusbspigpiomode
Please use the above mentioned firmware and make the necessary changes to you application and see if it suits your needs.
Thanks for the link! I missed that in my search.
I changed the CyU3PGpioSetValue to CyU3PGpioSimpleSetValue and also used that to set the clock high and low (it was calling a routine for that). That brought it down to a bit under 2usec.
I also realized when I used the alternate method in the code (*regPtrMOSI |= CYFX_GPIO_HIGH;) I had failed to remove the 1usec delays. That method now is about 1usec clock period.
I'm assuming that's about as good as it will get? I was hoping for a 10x improvement.
1 of 1 people found this helpful
The result that you are getting would be the maximum that can be achieved.
The PCLK for FX3 is 200MHz but it goes through a series of internal clock dividers which introduces the delays.
Thanks, I'll try another approach then.