TCPWM GPIO firmware control

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user_284076
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10 replies posted 10 likes given 5 replies posted

Hi,

Can we implement similar functionality mentioned here https://community.cypress.com/docs/DOC-14244​ for PSOC3/5LP in PSOC4.

Can we control GPIO from firmware while it is connected to TCPWM and TCPWM is in stop condition?.

Regards,

Hardik Harpal

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Ekta_N
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750 replies posted First like given 250 solutions authored

Hello Hardik,

It is possible to control GPIO from firmware while it is connected to TCPWM and TCPWM is in stop condition in case of PSoC 4.

However, the implementation is different from that in the case of PSoC 5 and PSoC 3.

In case of PSoC 4 we have HSIO Matrix.The high-speed I/O matrix (HSIOM) is a group of high-speed switches that routes GPIOs to the peripherals inside the device. This register provides up to 16 different options for a pin as listed in table below:

pastedImage_0.png

Suppose, you want to switch from DSI signal control to firmware control for a pin P5[2]. Then you need to set second nibble of the HSIOM_PORT_SEL5 register to Value 0, that is Pin is regular firmware controlled I/O. After this you need to set the drive mode for the pin.

You can use the following code in PSoC 4 which is similar to that given in the KBA: Firmware Control of Hardware Output Pin in PSoC 3/5LP– KBA221509

#include "project.h"

uint32 temp;

int main(void)

{

    CyGlobalIntEnable; /* Enable global interrupts. */

 

    /* Place your initialization/startup code here (e.g. MyInst_Start()) */

    PWM_Start();

    CyDelay(6000);

    PWM_Stop();

    temp = CY_GET_REG32 (CYREG_HSIOM_PORT_SEL5);

    CY_SET_REG32 (CYREG_HSIOM_PORT_SEL5, CY_GET_REG32 (CYREG_HSIOM_PORT_SEL5) & 0xFFFFF0FF);/*for P5[2] pin*/

    Pin_Out_SetDriveMode(Pin_Out_DM_RES_UP);

    Pin_Out_Write(0);

 

 

    for(;;)

    {

        /* Place your application code here. */

    }

}

For more details on HSIOM please refer to the architecture TRM for PSoC 4: https://www.cypress.com/file/218741/download

I have attached sample project with this implementation for a 4200L device.

Please let me know in case of further clarifications.

Updated

To revert back to the TCPWM IO from GPIO, you need to set the value of CYREG_HSIOM_PORT_SEL5 value back to temp. This can be done as follows:

CY_SET_REG32 (CYREG_HSIOM_PORT_SEL5, temp);

Best Regards

Ekta

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Ekta_N
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750 replies posted First like given 250 solutions authored

Hello Hardik,

It is possible to control GPIO from firmware while it is connected to TCPWM and TCPWM is in stop condition in case of PSoC 4.

However, the implementation is different from that in the case of PSoC 5 and PSoC 3.

In case of PSoC 4 we have HSIO Matrix.The high-speed I/O matrix (HSIOM) is a group of high-speed switches that routes GPIOs to the peripherals inside the device. This register provides up to 16 different options for a pin as listed in table below:

pastedImage_0.png

Suppose, you want to switch from DSI signal control to firmware control for a pin P5[2]. Then you need to set second nibble of the HSIOM_PORT_SEL5 register to Value 0, that is Pin is regular firmware controlled I/O. After this you need to set the drive mode for the pin.

You can use the following code in PSoC 4 which is similar to that given in the KBA: Firmware Control of Hardware Output Pin in PSoC 3/5LP– KBA221509

#include "project.h"

uint32 temp;

int main(void)

{

    CyGlobalIntEnable; /* Enable global interrupts. */

 

    /* Place your initialization/startup code here (e.g. MyInst_Start()) */

    PWM_Start();

    CyDelay(6000);

    PWM_Stop();

    temp = CY_GET_REG32 (CYREG_HSIOM_PORT_SEL5);

    CY_SET_REG32 (CYREG_HSIOM_PORT_SEL5, CY_GET_REG32 (CYREG_HSIOM_PORT_SEL5) & 0xFFFFF0FF);/*for P5[2] pin*/

    Pin_Out_SetDriveMode(Pin_Out_DM_RES_UP);

    Pin_Out_Write(0);

 

 

    for(;;)

    {

        /* Place your application code here. */

    }

}

For more details on HSIOM please refer to the architecture TRM for PSoC 4: https://www.cypress.com/file/218741/download

I have attached sample project with this implementation for a 4200L device.

Please let me know in case of further clarifications.

Updated

To revert back to the TCPWM IO from GPIO, you need to set the value of CYREG_HSIOM_PORT_SEL5 value back to temp. This can be done as follows:

CY_SET_REG32 (CYREG_HSIOM_PORT_SEL5, temp);

Best Regards

Ekta

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