Please use the following code for switching clock to EXTCLK in case of PSoC 4100S Plus
CY_SET_REG32((void *)(CYREG_HSIOM_PORT_SEL0), (CYVAL_HSIOM_IO0_SEL_ACT_0 << (6 * 4))); /* HSIOM_IO0_SEL_ACT_0 */
CY_SET_REG32((void *)(CYREG_GPIO_PRT0_PC), (LED_DM_DIG_HIZ << (6 * 3))); /* High Impedance Digital */
/* 6 is a pin number, 3 and 4 are bitfield widths */
I have attached the sample project below.
Thank you for your response.
Added changes to register settings suggested by you.
Then, it was confirmed that the clock switched normally.
I think that the compile contents set to ECO are different for each device or maybe the version of the boot component.
We hope there is an application note.
Hello Masashi -San,
This issue will be fixed in the next release of PSoC Creator.
I understood that it will improve in the next version of PSoC Creator.
I appreciate your support.