Can you please let me know which firmware you are using? Is the standard power bank firmware available in the SDK or the did you modify the firmware.
Also you can refer to this thread Re: CCG3PA as a BC1.2 Sink(Portable Device)
CCG3PA supports BC1.2 sink.
In case of BC1.2, if only BC1.2 source DUT connected to CCG3PA, we observed that Sink detection not happening ie primary and secondary detection is failing (Always CCG3PA acts as a Sink). But BC1.2 works only when BC1.2 Source DUT with PD support.
Is there any provision in CCG3PA to detect the BC1.2 source DUT(which do not support PD).
As per your reference mentioned above ,we have made the configuration such that BC1.2 is enabled along with apple charging (Fig 1) and Type A configuration is enabled (Fig 2).
And we have disabled
#define CCG_TYPE_A_PORT_ENABLE (0u)
in the source code (stack_params.h).
Because before disabling the macro the BC1.2 state machine was entering into source mode(Fig 3) in the code flow. So do this have any effect.
Fig 1: Both BC1.2 and apple charging configuration enabled.
Fig 2: Type A configuration is enabled
Fig 3: BC1.2 sorce mode reference.
Please enable the LEGACY_PD_PARALLEL_OPER macro present in stack_params.h file in the power bank firmware and load the firmware (.cyacd) file using the EZ-PD configuration Utility. This should solve the problem.
#define LEGACY_PD_PARALLEL_OPER (1u)
We are the enabling the LEGACY_PD_PARALLEL_OPER macro present in stack_params.h file in the power bank firmware but we are facing the same issue.
Let me explain what are the steps we are following for BC1.2(sink) validation so that you can correct me if i am wrong anywhere:
1. We are loading the firmware to the CCG3PA DVK board using mini prog and Psoc programmer utility.
Note : Before updating the firmware we are making all the configuration (ie BC1.2 is enabled along with apple charging and Type A configuration is enabled)
2. After loading the firmware we are connecting the BC1.2 source device to type-c port of CCG3PA DVK board.
3. In the mean time we are probing the D+/D- lines (TP9 and TP12) in DVK board but we are unable to see primary and secondary detection.
And if we use the source DUT which supports both PD and BC1.2 the primary and secondary detection works but if we connect only BC1.2 source DUT it is failing.
Is there any condition that if the DUT should support both PD and BC1,2 to achieve BC1.2 sink feature in CCG3PA.
Can you check the same functionality with a CDP like the ports on a PC?
The macro that I mentioned in the previous response is responsible, If the macro is disabled
#define LEGACY_PD_PARALLEL_OPER (0u)
the the source device is needed to support PD.
If the macro is enabled then non PD capable device can also support BC 1.2.
I tested this on my side, The CCG3PA is successfully detecting BC 1.2 source CDP.
Can you please let me know which version of CCGx power SDK you are using? You can check this in the release notes.
Also you can try disabling the macro and testing the same again.
Please use a CDP source like ports on a laptop and test the same.
Thanks and Regards,