4 Replies Latest reply on Nov 21, 2019 10:07 PM by EktaN_26

    Error: mpr.M0006: Datapath found without a clock. This is not allowed.

    CAAG_1860411

      Hello

       

      I created a Verilog file where I have combinational logic. I generate a symbol, a Verilog file, and a Datapath, and I have registers of my hardware description file. But when I want to build my design, it shows me this error M0006, and I don't know how to fix it.

       

      Thanks