I believe that OE consumes extra pin, so only 4 pins with OE are available per port.
Maybe there are other solutions to your goal. Can you describe what is the goal ?
Do you really need pins in Hi-Zin state?
there are only 4 OEs for any given 8 bit port. However, it should be possible to control that 8 bit port with 2 OEs, because I only need some ports as outputs and some ports as inputs. It is not known in advance which port pins are outputs and which are inputs so it should be flexible. So e.g. OE1 will be used for port pins 0,3,4 and OE2 for port pins 1,2,5,6,7.
If high-speed switching is not required, then changing Pin mode (digital input / output) can be done with software API calls.
Yes, that is the case.
But e.g., how will the Pin 1.3 know that it is connected to the OE1 and Pin 1.5 to the OE2 ?
Register PRT[x]_OE_SEL1[n], PRT[x]_OE_SEL0[n] bits will switch between OE1 and OE2 by means of software calls.
But I need to control that OE1 and OE2.
How to draw it in the schematics ?
This is for PSoC 4 and I am using PSoC 5LP.
The other thing is that I want DSI to generate OE1 and OE2 and Register PRT[x]_OE_SEL1[n], PRT[x]_OE_SEL0[n] bits to select OE1 or OE2 for every pin in the 8 bit port.
In other words, PSoC 5LP does have 4 OEs but it lacks formal way of using them efficiently.
You can set pin directly to HiZ / StrongDrive (ignore output enable, use regular digital pins)
// Set P3 to Digital HI-Z
//Set P3 to Strong Drive mode
Or direct API
However, this does not solve my problem as it is too slow.
I really need those two OEs to be mapped statically by means of software and then they are toggled by means of DSI UDBs.
I think the formal method of doing that is not available - if yes, please, correct me.
Do you need OE driven by hardware signal? I believe that only 4 pins with OE per port can be hardware-driven. Each hardware OE connector consumes one extra pin, so 8 pins with OE are not possible per port.
Yes, I need OE1 and OE2 driven by hardware signals, i.e. by DSI.
Then I need to assign either OE1 or OE2 to 8 pins on a single port (e.g. Port 1) by means of Register PRT[x]_OE_SEL1[n], PRT[x]_OE_SEL0[n] bits. That assignemt is done statically by means of software and it is not time critical.
However, OE control is time critical and must be done by HW DSI UDB signals.
Thanks for your help.
Hi. Maybe I'm missing the true question here. Can you draw in TopDesign what you want even if it doesn't compile?
Here's my understanding of what I think you want all on one contiguous port. This compiles.
You should be able to change the Control_Reg for some other logic component or routing of an input pin.
Does it absolutely has to be a single port?
You cannot group 8 pins into 1 block if you want to use more than 1 OE signal.
Each port pin must be kept and controlled separately.
There are 4 OEs coming from DSI UDB for each 8 pin port.
So I am using the PSoC 5LP up to its limits but not exceeding them.
I will send you some example of schematics bit later.
Yes, it must be in a single port !