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    PSoC 5LP DSI and OE for Port Pins

    IvPa_4102121

      PSoC 5LP Architecture TRM, p.159, Figure 19-8 shows Mapping of DSI Control Signal to Port Pin Output Enable.

      I have a design where an 8 bit Port is used.

      Each Port pin should go either to DSI_OE[0] or DSI_OE[1], depending on the value of the corresponding PRT[x]_OE_SEL1[n], PRT[x]_OE_SEL0[n] bits.

      When using schematics entry, I cannot use 2:1 input multiplexer for DSI_OE[1:0] DSI signals, one for every Port Pin and place all the pins into the same 8 bit Port.

      I there a workaround, please ?

       

      In other words, can I somehow instantiate DSI_OE[1:0] DSI output in the schematic and then use software to write to PRT[x]_OE_SEL1[n] registers.

      (Note what I need: There are 8 port pins which must be on a single Port and each of them is controlled either by DSI_OE[0] or DSI_OE[1]. )

      Anybody knows the trick ?

       

      Example file attached.

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