[PSoC programmer] Write error ==> Timeout of SPC polling. Lost communication with chip (Status = 0x1E)

Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

cross mob
ToKi_1339406
Level 2
Level 2
10 questions asked 5 replies posted 5 questions asked

Dear all,

When we download f/w using PSoC 5LP chipset using Miniprog3 and PSoC Programmer ,as below error message was occurred.

As search result in Cypress forum, it seems that the relevant patch has been applied to the latest PSoC programmer tool but this issue is caused on the latest
version of PSoC programmer. Please let me know the solution or guide..

- Chipset: CY8C5268AXI-LP047
- H/W Miniporg3 Rev *B
- S/W  PSoC Programmer 3.28.5.4358

>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
Program Finished at pm 4:57:16                  |
                                                | FAILED! EraseAll operation failed!
                                                | Timeout of SPC polling. Lost communication with chip (Status = 0x1E)
Device set to CY8C5268AXI-LP047 at pm 4:57:14   | 262144  FLASH bytes
Device Family set to CY8C5xxxLP at pm 4:57:14   |
                                                | Automatically Detected Device: CY8C5268AXI-LP047
                                                | JtagID: 2E 12 F0 69
Program Requested at pm 4:57:13                 |
<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<

Regards,

Tony Kim

0 Likes
1 Solution

Hi ToKi_1339406,

Regarding your Power line connections -

1. 0.1uF (C18) and 10uF (C19) capacitors are connected to VDDA pin. It is recommended to connect 0.1uF and 1uF capacitors with the 0.1uF capacitor placed close to the IC.

2. A 0.1uF (C17) capacitor is connected to VCCA pin. Connect a 1uF capacitor to the VCCA pin.

3. VDDIO pins are directly connected to VDDD. It is recommended to connect a 0.1uF capacitor to VDDIO pins.

4. A 10uF and a 0.1uF are to be connected to each VDDD pin.

5. A 1uF capacitor is to be connected to the VCCD pin instead of a 0.1uF (C37) capacitor.

6. Lastly, it is not recommended to connect a series resistor (R38) and shunt capacitors (10uF - C26 and 0.1uF - C28) to the XRES line.

pastedImage_1.png

Please also refer to PSoC 3 and PSoC 5LP Hardware Design Considerations ​ and PSoC 5LP: CY8C52LP Family Datasheet Programmable System-on-Chip (PSoC) for further information.

Thanks and Regards,

Rakshith M B

Thanks and Regards,
Rakshith M B

View solution in original post

0 Likes
3 Replies
Rakshith
Moderator
Moderator
Moderator
250 likes received 1000 replies posted 750 replies posted

Hi ToKi_1339406​,

If you are using a custom board please ensure that these connections are correct -

1. Programming pin connections. Please refer to 'Hardware Connections' section in PSoC® 5LP Device Programming Specifications​.

2. Power pin connections. Please refer to 'PSoC Power Pin Connections' sections in PSoC 3 and PSoC 5LP Hardware Design Considerations.

Can you also let me know if the other functionalities of PSoC Programmer like Checksum, Verify etc., are working. You can also manually try to erase flash by clicking on 'Erase All Flash' under 'File' menu.

Thanks and Regards,

Rakshith M B

Thanks and Regards,
Rakshith M B
0 Likes

Hi Rakshith,

Please refer as below PSoC Programmer test result for your question#1 and find attached schematic for your question#2.

1 Checksum :

Checksum Finished at pm1:27:24 |                                            
| Mismatches with HEX file
                                       
| Checksum of PSoC Flash is 0x5AB0
                                           
| Checksum of HEX File is 0x2DD7
                                           
| Attempt Checksum for 262144 bytes device
Device set to
CY8C5268AXI-LP047 at pm
1:27:23    | 262144  FLASH bytes
Device Family
set to CY8C5xxxLP at pm
1:27:23      |
                                           
| Automatically Detected Device: CY8C5268AXI-LP047
                                           
| JtagID: 2E 12 F0 69
Checksum
Requested at pm
1:27:22           
      |

  1. Verify :

EraseAll
Finished at pm
1:29:39            |                                            
| EraseAll Failed
                                           
| Checksum test is not 0x0000. It is 0x62C4A4

Device set to
CY8C5268AXI-LP047 at pm
1:29:39    | 262144  FLASH bytes

Device Family
set to CY8C5xxxLP at pm
1:29:39      |                                            
| Automatically Detected Device: CY8C5268AXI-LP047
                                       
| JtagID: 2E 12 F0 69

EraseAll
Requested at pm

1:29:38                      |

0 Likes

Hi ToKi_1339406,

Regarding your Power line connections -

1. 0.1uF (C18) and 10uF (C19) capacitors are connected to VDDA pin. It is recommended to connect 0.1uF and 1uF capacitors with the 0.1uF capacitor placed close to the IC.

2. A 0.1uF (C17) capacitor is connected to VCCA pin. Connect a 1uF capacitor to the VCCA pin.

3. VDDIO pins are directly connected to VDDD. It is recommended to connect a 0.1uF capacitor to VDDIO pins.

4. A 10uF and a 0.1uF are to be connected to each VDDD pin.

5. A 1uF capacitor is to be connected to the VCCD pin instead of a 0.1uF (C37) capacitor.

6. Lastly, it is not recommended to connect a series resistor (R38) and shunt capacitors (10uF - C26 and 0.1uF - C28) to the XRES line.

pastedImage_1.png

Please also refer to PSoC 3 and PSoC 5LP Hardware Design Considerations ​ and PSoC 5LP: CY8C52LP Family Datasheet Programmable System-on-Chip (PSoC) for further information.

Thanks and Regards,

Rakshith M B

Thanks and Regards,
Rakshith M B
0 Likes