VCCD is used for POR monitoring.
- VDDD is Power supply for both analog and digital sections (where there is no VDDA pin)
- VCCD is Regulated digital supply (1.8 V ±5%)
As the additional information, please refer to the PSoC 4200 L datasheet
Section "Unregulated External Supply" and "Regulated External Supply".
Thank you for your update.
I'd like to confirm POR release conditions.
I think that POR is released when VCCD exceeds the threshold and the internal oscillator stabilizes.
I think the threshold of VCCD is 1.71V(1.8V - 5%).
Is my idea correct?
How long does it take for the internal oscillator to stabilize after VCCD exceeds the threshold?
Apologize for late response...
Answer 2) If you say POR, you should consider VDDD. Then, it would be Min value of VDDD.
Note that there are 2 cases with regular enabled / internal unregurated supply.
PSoC® 4: PSoC 4200L Datasheet
Answer 3) According to Figure 4-2. Timing Diagram of Entering Test Mode, CY8C4xxx, CYBLxxxx Programming Specifications (https://www.cypress.com/file/409516/download)
the IMO stabilization would be happened before "boot code" executed.
So, it would be approximately less that 1ms.