6 Replies Latest reply on Oct 16, 2019 9:55 PM by AlakanandaB_86

    GPIO logic thresholds


      PSoC 3 Pins component has a Vref option:

      This then requires an external Vref, which can be set to 0.256 V:

      But the datasheet doesn't seem to list the "Input voltage low threshold" for this configuration?  What are the margins of error on this threshold?