8 Replies Latest reply on Nov 25, 2019 10:38 PM by SudheeshK_26

    Using an FPGA as a HyperBus slave


      I'm interested in using an ARM microprocessor with a HyperBus interface attached to an FPGA; where the FPGA is a slave device with memory mapped registers that act as an extension of memory space to the uProc. Does Cypress support this type of configuration? If so; is there a reference design or IP package available?