S25FL064L reading support

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MaKu_4514886
Level 2
Level 2

I am using MPC5606s micro, I am new For QSPI Chip,If i try to read the content from QSPi Chip after flashing, First two bytes are missing and third and fourth content able to read, next fifth and sixth content is missing.support me if i am missing any command to read(continous read)

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1 Solution

Hi Mahesh,

Thank you for your reply.

1. Since you are able to read device id correctly, this means SPI communication has been set up properly.

2. The command sequence mentioned by you seems to be incorrect. What are you trying to do exactly by sending the above mentioned sequence of commands? I would like to inform you about the correct sequence of commands for the various operations -

  • For setting the Quad bit (CR1NV[1]) in Configuration Register 1 (CR1) -

As you can see in the datasheet (https://www.cypress.com/file/316661/download ) that the Quad bit is in Configuration Register 1, and using the WRR(01h) command will require you to send the Status Register 1 value before sending the Configuration Register 1 value. In such a case, using the WRAR(71h) command to write directly to CR1NV is a better option. If you go to page number 73 of the datasheet, you can see that the address of CR1NV register is (0x000002), hence we directly program the desired CR1 value to the following location. The WRAR command also requires the WREN(06h) command before it. The sequence of commands will be -

     - Make CS# LOW

     - Send WREN (0x06) command

     - Make CS# HIGH (Please note that it is very necessary to make the CS# HIGH after completing any operation with the flash device. If not, the command shall not be executed.)

     - Make CS# LOW

     - Send WRAR (0x71) command

     - Send three bytes of address (0x000002) (One byte at a time)

     - Send the value of CR1NV (For your case it should be 0x02 since you only want to program CR1NV[1] bit. Please be careful while programming CR1NV as it has several OTP (One Time Programmable) bits. Once programmed, these bit values cannot be changed.)

     - Make CS# HIGH

     - Make CS# LOW

     - Read Status Register 1 (RDSR1 (05h) command) to check the value of WIP (Work In Progress) bit.

     - Make CS# HIGH

     - Put the above sequence of commands in a while loop and keep polling the SR1 till the value of WIP bit becomes equal to zero.

  • For Quad Page Program command

Since you are using the Quad mode, you will have to use the Quad Page Programming (QPP 32h) command instead of the single SPI Page Program command. The QPP command also requires the WREN command ahead of it.

     - Make CS# LOW

     - Send WREN (0x06) command

     - Make CS# HIGH

     - Make CS# LOW

     - Send QPP (0x32) command

     - Send three bytes of address (One byte at a time)

     - Send all the data bytes to be programmed (One byte at a time)

     - Make CS# HIGH

     - Make CS# LOW

     - Read Status Register 1 (RDSR1 (05h) command) to check the value of WIP (Work In Progress) bit.

     - Make CS# HIGH

     - Put the above sequence of commands in a while loop and keep polling the SR1 till the value of WIP bit becomes equal to zero.

  • For Quad Output Read command

Please note that the QOR command (6Bh) requires latency cycles depending upon the frequency that you are working on. Please go to page number 35 of the datasheet and determine the number of latency cycles required for your application

     - Make CS# LOW

     - Send QOR (0x6B) command

     - Send three bytes of address (One byte at a time)

     - Send dummy cycles

     - Receive data on the IO lines

     - Make CS# HIGH

If your problem persists, please feel free to contact us again. I would also like to recommend you to use a logic analyzer to observe the SPI signals and share it with us.

Best Regards,

Apurva

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15 Replies
Apurva_S
Moderator
Moderator
Moderator
100 likes received 500 replies posted 250 solutions authored

Hi Mahesh,

Thank you for contacting Cypress Semiconductor.

  1. As you are new to using SPI Flash, as a first step you could try reading the device ID of the flash to confirm that the SPI communication has been set up properly.
  2. Could you please tell me the exact command sequence that you are following for writing to the device and reading the data back?
  3. Are you using the device in quad mode?
  4. Do you have the SPI waveforms recorded for write and read operations? If yes, can you please share it with us?
  5. How many devices are showing this behavior?

Best Regards,

Apurva

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MaKu_4514886
Level 2
Level 2

1) I am new to SPI Flash,For Read Device ID, I Send command 0x9Fh, I can able to Read  data -> 01,60,17(given in the data sheet)

2) Clip Select Low,Read Configuartion(0x35h)->WREN(0x50h)-WRR(0x01h)[For Writing]

3) Quad Mode using

4) using only one device.

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Hi Mahesh,

Thank you for your reply.

1. Since you are able to read device id correctly, this means SPI communication has been set up properly.

2. The command sequence mentioned by you seems to be incorrect. What are you trying to do exactly by sending the above mentioned sequence of commands? I would like to inform you about the correct sequence of commands for the various operations -

  • For setting the Quad bit (CR1NV[1]) in Configuration Register 1 (CR1) -

As you can see in the datasheet (https://www.cypress.com/file/316661/download ) that the Quad bit is in Configuration Register 1, and using the WRR(01h) command will require you to send the Status Register 1 value before sending the Configuration Register 1 value. In such a case, using the WRAR(71h) command to write directly to CR1NV is a better option. If you go to page number 73 of the datasheet, you can see that the address of CR1NV register is (0x000002), hence we directly program the desired CR1 value to the following location. The WRAR command also requires the WREN(06h) command before it. The sequence of commands will be -

     - Make CS# LOW

     - Send WREN (0x06) command

     - Make CS# HIGH (Please note that it is very necessary to make the CS# HIGH after completing any operation with the flash device. If not, the command shall not be executed.)

     - Make CS# LOW

     - Send WRAR (0x71) command

     - Send three bytes of address (0x000002) (One byte at a time)

     - Send the value of CR1NV (For your case it should be 0x02 since you only want to program CR1NV[1] bit. Please be careful while programming CR1NV as it has several OTP (One Time Programmable) bits. Once programmed, these bit values cannot be changed.)

     - Make CS# HIGH

     - Make CS# LOW

     - Read Status Register 1 (RDSR1 (05h) command) to check the value of WIP (Work In Progress) bit.

     - Make CS# HIGH

     - Put the above sequence of commands in a while loop and keep polling the SR1 till the value of WIP bit becomes equal to zero.

  • For Quad Page Program command

Since you are using the Quad mode, you will have to use the Quad Page Programming (QPP 32h) command instead of the single SPI Page Program command. The QPP command also requires the WREN command ahead of it.

     - Make CS# LOW

     - Send WREN (0x06) command

     - Make CS# HIGH

     - Make CS# LOW

     - Send QPP (0x32) command

     - Send three bytes of address (One byte at a time)

     - Send all the data bytes to be programmed (One byte at a time)

     - Make CS# HIGH

     - Make CS# LOW

     - Read Status Register 1 (RDSR1 (05h) command) to check the value of WIP (Work In Progress) bit.

     - Make CS# HIGH

     - Put the above sequence of commands in a while loop and keep polling the SR1 till the value of WIP bit becomes equal to zero.

  • For Quad Output Read command

Please note that the QOR command (6Bh) requires latency cycles depending upon the frequency that you are working on. Please go to page number 35 of the datasheet and determine the number of latency cycles required for your application

     - Make CS# LOW

     - Send QOR (0x6B) command

     - Send three bytes of address (One byte at a time)

     - Send dummy cycles

     - Receive data on the IO lines

     - Make CS# HIGH

If your problem persists, please feel free to contact us again. I would also like to recommend you to use a logic analyzer to observe the SPI signals and share it with us.

Best Regards,

Apurva

MaKu_4514886
Level 2
Level 2

Thanks Apurva For Your Reply,

My controller(mpc5606s) External, Memory-mapped Serial Flash ->0x80000000(start adress) and 0x87FFFFFF(end address)

During Page Program Command,If I send three bytes of address, it will accept?

Register CR1NV, Any option to set CR1V register to run the hardware Configuartion same as CR1NV.

In my project,Flashing the HEX file Content through Flashing device, During Power On, Just we will intialize Quad SPI, After that DMA Will take care.Kindle conform Above Sequence will work for my Project.

Thanks in Advance

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Hi Mahesh,

The default configuration of our device S25FL064L is to accept 3 bytes of address after a program, erase and read commands. As long as the bit 1 in configuration register 2 is not set to 1 (1 = 4-byte address, 0 = 3-byte address), you can use 3 bytes of address for program, erase and read operations.

During power up all of the volatile registers (e.g. CR1V) are initialized to the data in CR1NV and flash device uses the configurations in volatile registers during run time. As per my understanding you need to enable the quad mode after every power up. Please correct me if I am wrong. To do this, you can set the QUAD bit in CR1NV to 1 and the QUAD bit in CR1V will be enabled by default after every power up. Please see more details in our knowledge base article available at: Volatile and Non-Volatile Registers in Serial Flash Devices – KBA228310 .

I am not familiar with DMA feature in mpc5606s. As long as the QUAD bit is set in configuration register 1, our flash will respond to all the QUAD SPI commands (program, erase, read etc). If you are facing any issues, please capture SPI waveform failed operations using a logic analyzer and send to us. We can review them and let you know if there are any issues.

Our low level driver for SPI devices are available at: https://www.cypress.com/documentation/software-and-drivers/low-level-driver-spi-flash?source=search&... . You can use it as a reference to access our flash device in your application.

Thanks and Regards,

Sudheesh

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MaKu_4514886
Level 2
Level 2

Hi sudheesh

In My project, We are using grapics content in QuadSPI,Frequently we will update the Grapics content.

Is it Possible to Flash the memory frequency ? or only one time Flash.

Thanks

Mahesh

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MaKu_4514886
Level 2
Level 2

Hi Sudheesh

Thanks in Advance

I Tried with Apurva command, I can able to flash the memory only one time.

After that i cannot able to flash,Any option to flash again the memory.

Thanks

Mahesh

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Hi Mahesh,

Yes, it is possible to reprogram our flash memory multiple times.

You have to erase the flash memory locations before reprogramming new data. Did you erase the flash memory before reprogramming new data? Please see the section "8.6 Erase Flash Array Commands" in datasheet for more details about the erase commands.

Command sequence for sector erase operation

  1. CS# LOW
  2. Send WREN comand
  3. CS# HIGH
  4. CS# LOW
  5. Send sector erase command (0x20)
  6. Send sector address (3 bytes)
  7. CS# HIGH
  8. Read status register in a loop until the WIP bit is 0
    1. CS# LOW
    2. Send RDSR command (0x05)
    3. Read status register data
    4. CS# HIGH
    5. Check if WIP bit is 0 or not.

Please refer our low level driver to know about the implementation of different flash operations.

Thanks and Regards,

Sudheesh

Hi sudheesh

Thanks for your support...

I tried your erase and write Command sequence,0000000h to 07FFFFFh,Writing data is not possible for second times.

But if i try erase and write Command sequence in memory starting address 0x0300h given in data sheet page no114(under Table 38. SFDP Overview Map), I can able to flash memory multiple times.

Thanks

Mahesh

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Hi Mahesh,

Thank you for your reply.

Could you please tell the exact part number of the device that you are using and the datasheet that you are following?

Could you please follow the below command sequence and let us know your observations -

1. Send WREN command.

2. Read SR1 to confirm WEL is set.

3. Send sector erase command and sector address

4. Poll SR1 continuously to check the value of WIP bit and confirm that erase operation is complete

5. Send WREN command.

6. Read SR1 to confirm WEL is set.

7. Send page program command, starting address for programming and the data bytes to be programmed.

8. Poll SR1 continuously to check the value of WIP bit and confirm that erase operation is complete

Please use a logic analyzer to record the SPI signals for the above operations and share the waveforms with us.

Regards,

Apurva

MaKu_4514886
Level 2
Level 2

Hi

Thanks to Apurva and sudheesh...

Data Sheet link is given below

https://www.cypress.com/file/316661/download

Page no-110 table no-39..

After flash and reading from staring memory address 0x300 given in table no-39

it is working fine..

Thanks

Mahesh

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Hi Mahesh,

We need clarification regarding your latest response.

0x300 is the starting address for SFDP parameters. The SFDP address space is programmed by Cypress and read-only for the host system. Which means you cannot perform write operations in this memory space.

What are you trying to do exactly in this memory space? Also, in the last line you have mentioned it is working fine, what are you referring to exactly in this line? Is your main issue resolved or still pending?

Best Regards,

Apurva

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MaKu_4514886
Level 2
Level 2

Hi Apurva

Thanks Apurva for your support...

If we try Block Erase starting address as 0x000,It will affect the SFDP address space is programmed by Cypress.

Erase sector and write data From starting address 0x1000h, it is working fine...

Thanks

Mahesh

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Hi Mahesh,

The SFDP space is a different memory space, apart from the main flash array. It is read only, hence does not get affected by erase/program commands. There is a separated read command to read the SFDP space (RSFDP command). SFDP space cannot be read using normal read command which is used to read flash memory array.

From your previous reply I can understand that erase and write are working fine at address 0x1000, which is the starting address for second sector. Are you still facing issues while erasing and programming to the first sector?

Regards,

Apurva

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MaKu_4514886
Level 2
Level 2

Hi Apurva

Erase and write Started from address 0x00(Starting Sector),Now I Can able to erase and write from Memory address 0x000 to 7FFFFF

Thanks For Your Support....

Regards,

Mahesh

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