3 Replies Latest reply on Oct 14, 2019 11:42 PM by MaMi_1205306

    FM24C16B-G : SCL tLOW characteristics

    MaMi_1205306

      Hi,

       

      We would like to confirm for SCL tLOW characteristics of FM24C16B-G.

       

      The datasheet lists the minimum value of tLOW but not the maximum value.

       

      For example, when using 100kbps,
      One clock cycle is 10us.
      In other words, the high period is 5us and the low period is 5us.
      However, does the device work properly even if the low period is 20us in rare cases?

       

      For some reason, the low period of the clock of the I2C master is operating longer.

      I understand that this is a problem on the master side, but do you think this FRAM can output data normally even with such a clock?

       

      This device doesn't have a clock stretch function, right?

       

      Regards,

        • 1. Re: FM24C16B-G : SCL tLOW characteristics
          MaMi_1205306

          I got the access timing.

          There are times when the SCL ‘L’ period is as long as 20 us.
          Is this possible to affect FRAM operation?

          • 2. Re: FM24C16B-G : SCL tLOW characteristics
            ShupingZ_76

            Hi,

             

            FM24C16B follows the I2C-bus specification on the specification of tLOW (Clock LOW period), So tLOW has only a min limit.

            However, you can consider the max is indirectly determined by its tHIGH or Clock HIGH period. Condition is that system timing must satisfy tLOW + tHIGH <= 1/fSCL; As long as this condition is met, tLOW or tHIGH max can be adjusted to any value.

            fSCL can be 0Hz to 100KHz in standard mode, 400KHz in fast mode, 1MHz in fast mode plus, and is determined by master side, so tLOW max can be any value as long as tHIGH min timing is satisfied.

             

            In your case, tLOW of 20us is ok as long as tHIGH min timing is satisfied.

             

            Also, FM24C16B doesn't support clock stretching.

            • 3. Re: FM24C16B-G : SCL tLOW characteristics
              MaMi_1205306

              Thank you for your reply.

               

              It was MCU port control, not I2C master hardware.

              Probably because the MCU is doing another process, the time is extended.

              I understood that there was no problem as FRAM.

               

              Regards,