1 Reply Latest reply on Oct 9, 2019 8:04 PM by RashiV_61

    FX3 setting the DMA burst length and  buffer size

    Jesh_4247096

      I want to change the DMA burst length and buffer size. The firmware I'm using is the SlaveFifoSync, which I downloaded from the AN65974. I notice that the the default setting is following(sorry, I can't find how to insert code):

       

      #ifdef STREAM_IN_OUT

      #define BURST_LEN 16

      #define DMA_BUF_SIZE (16)

      /* Slave FIFO P_2_U channel buffer count */

      #define CY_FX_SLFIFO_DMA_BUF_COUNT_P_2_U      (4)

      /* Slave FIFO U_2_P channel buffer count */

      #define CY_FX_SLFIFO_DMA_BUF_COUNT_U_2_P   (8)

      #endif

       

      So I change the setting like this:

       

      #ifdef STREAM_IN_OUT

      #define BURST_LEN 16

      #define DMA_BUF_SIZE (16)

      /* Slave FIFO P_2_U channel buffer count */

      #define CY_FX_SLFIFO_DMA_BUF_COUNT_P_2_U      (1)

      /* Slave FIFO U_2_P channel buffer count */

      #define CY_FX_SLFIFO_DMA_BUF_COUNT_U_2_P   (1)

      #endif

       

      It works fine for my application. But the DMA buffer is still large. It spends about 6 seconds for data to fill the 16KB buffer. So I want to continue  to reduce the DMA buffer size. The setting is following:

       

      #ifdef STREAM_IN_OUT

      #define BURST_LEN 2

      #define DMA_BUF_SIZE       (2)

      /* Slave FIFO P_2_U channel buffer count */

      #define CY_FX_SLFIFO_DMA_BUF_COUNT_P_2_U      (1)

      /* Slave FIFO U_2_P channel buffer count */

      #define CY_FX_SLFIFO_DMA_BUF_COUNT_U_2_P    (1)

      #endif

       

      The buffer size is 2KB. But the data transfer failed. I don't know where is the problem. Maybe I made the wrong amendment, or I need to continue to modify something else. Thanks for any advice.