2 Replies Latest reply on Oct 1, 2019 12:26 AM by MaMi_1205306

    FM0+ : Conditions for INVL bit = 1

    MaMi_1205306

      Hi,

       

      I would like to confirm for INVL bit of FM0+.

       

      FM0 + Family PERIPHERAL MANUAL Analog Macro URL

      https://www.cypress.com/file/223036/download

       

      The peripheral manual has the following description.

       

      /**************************************************************************/

      If the data is valid when reading from the FIFO data register (SCFD, PCFD),

      INVL = "0" is set. If the data is invalid, INVL = "1" is set.

      /**************************************************************************/

       

      We can understand when the data is valid.
      What are the reasons for invalidation of data?

       

      FM0 has priority conversion operation.

       

      /**************************************************************************/

      Priority conversion operation:

      Even during scan operation, if a start factor of priority conversion occurs, it is possible to interrupt

      the ongoing scan conversion and perform conversion with high priority (There are two priority

      levels: 1 and 2. Priority level 1 is higher than priority level 2.).

      Start factors are software and timers (priority level 2), and external triggers (priority level 1).

      /**************************************************************************/

       

       

      If a conversion request with a high priority is received during conversion,
      I think conversion results with low priority will be invalid.

      Please let us know if there are other invalid conditions.

       

      Regards,

        • 1. Re: FM0+ : Conditions for INVL bit = 1
          TakashiM_61

          Basically, INVL is set to 1, if ADC operation is suspended intentionally/accidentally.

          One of reason is due to Priority conversion operation, as you mentioned.

          If the ADC operation with Level1 priority is required during ADC operation with Level2 priority, the ADC operation with Level2 priority is suspended, and INVL is set to 1 for the ADC operation with Level2 priority. And, the ADC operation with Level2 priority is resumed and completed after the ADC operation with Level1 priority completion, then INVL is cleared.

          As the other case, when user stops ADC during its operation, INVL is set to 1.

           

          Anyway, please discard the ADC result data with INVL=1.

          • 2. Re: FM0+ : Conditions for INVL bit = 1
            MaMi_1205306

            Thank you for your answer.

             

            I thought that data might not be written to the FIFO when the conversion was interrupted, but it was an operation like accessing the FIFO even when AD conversion was interrupted.

            I understood this issue.

             

            Regards,