7 Replies Latest reply on Dec 2, 2019 9:57 PM by YashwantK_46

    Changes from StreamOut to StreamIn

    DhN_4227681

      Hi,

       

      StreamOUT transmits the data from the PC to FX3 and then to the FPGA.

       

      Commands from PC to FX3 and to FGPA through I2C communication:- this condition is working fine while receiving and sending commands, after this GPIF II must be stream IN condition and I2C interface must work for sending the received commands to ZYNQ.

      The FX3 must wait for the packets sent from GUI which inturn FX3 must route to ZYNQ via GPIF II Stream In interface.

      Can we change the direction from Stream Out to Stream In, if it is possible (i.e both streamin and streamout in single code)?

       

       

      Regards,

      Dhanuja

        • 1. Re: Changes from StreamOut to StreamIn
          HemanthR_06

          Hi Dhanunja,

           

          Does the data that needs to be sent to FPPA over GPIF interface come from USB Endpoint 0?

          If yes, then you can create a DMA channel with CPU as producer and PIB as consumer. When you get SetupCallback for Vendor command in your firmware, you need to take the data received and do a commit on the channel mentioned above.

           

          Regards,

          Hemanth

          • 2. Re: Changes from StreamOut to StreamIn
            DhN_4227681

            Hi,

             

            I just want to send some bytes of data from PC to  FX3 through GPIF 2. Is enough to creating the DMA channel or any other configuration has to added.

            • 3. Re: Changes from StreamOut to StreamIn
              YashwantK_46

              Hi Dhanuja,


              You will have to create a DMA channel between USB and PIB inorder to get data from host and commit it to PIB (GPIF interface).

              While creating the DMA channel, you will have to configure a callback for the channel.

              In this callback, the CPU needs to commit data to the PIB and set an event flag.

               

              You can refer to GpifToUsb example code that is provided with the EZ-USB FX3 SDK on how to create a DMA channel and a callback.

               

              Regards,

              Yashwant

              • 4. Re: Changes from StreamOut to StreamIn
                DhN_4227681

                Hi,

                 

                Created the DMA channel, still the data is not getting through GPIF.

                And, I take the buffers to transfer the data i.e  from fx3 to ZYNQ through GPIF 2.

                for(i=0;i<=15;i++)

                {

                data[0] = 'A';

                data[1] = 'A';

                data[2] = 'A';

                data[3] = 'A';

                data[4] = 'A';

                data[5] = 'A';

                data[6] = 'A';

                data[7] = 'A';

                data[8] = 'A';

                data[9] = 'A';

                data[10] = 'A';

                data[11] = 'A';

                data[12] = 'A';

                data[13] = 'A';

                data[14] = 'A';

                data[15] = 'A';

                if(isread)

                                    {

                status = CyU3PGpifReadDataWords (1,0, data[i], 0, CYU3P_NO_WAIT);

                            if (status != CY_U3P_SUCCESS)

                            {

                                return status;

                            }

                                    }

                                    else

                                  status = CyU3PGpifWriteDataWords (1,0, data[i], 0 ,CYU3P_NO_WAIT );

                                               if (status != CY_U3P_SUCCESS)

                                               {

                                                   return status;

                                               }

                }

                          status = CyU3PDmaChannelCommitBuffer (&glChHandleBulkSrc, 16, 0);

                }

                 

                Find the below attachment

                • 5. Re: Changes from StreamOut to StreamIn
                  YashwantK_46

                  Hello Dhanuja,

                   

                  The channel and commit buffer implementation in slavefifosync is from UtoP channel and PtoU channel.

                  But if you want to commit something that you have added in the firmware, you will have to create a channel between CPU and P-Port and commit the buffer containing data manually by asserting certain signals from the master.

                   

                  Please refer to USBBulkSrcSink example frimware with the SDK and create a channel between CPU and P-Port and then commit the buffer.

                  The data so committed will reach the buffer but won't go out of them until the master asserts the signals to read from the slave.

                   

                  But if you want to use the UtoP channel, you will have to send the 16 bytes from Control center and that will generate a DMA callback which will commit the data to PIB which can then be read by the master.

                   

                  Please refer to the default slavefifosync example to understand the UtoP channel implementaion.

                  The above process of committing is not correct and wo

                  • 6. Re: Changes from StreamOut to StreamIn
                    DhN_4227681

                    Hi,

                     

                    I am created the DMA channel between CPU Producer and P-port Consumer and the buffer containing in CyFxBulkSrcSinkDmaCallback1 function which was i sending the data. But still i am not getting the data in CyU3PGpifReadDataWords and CyU3PGpifWriteDataWords configuration.

                    • 7. Re: Changes from StreamOut to StreamIn
                      YashwantK_46

                      Hello Dhanuja,

                       

                      Please define iswrite as a global variable and assign it an initial value which would define if it is a read or write initially.

                       

                      Then, as soon as that process ( read or write ) is completed, change the value of the iswrite to CyTrue or CyFalse according to the value initially passed.

                      Example:

                      -> Initially, iswrite = CyFalse => is read

                      -> Read operation is done. Then change iswrite = CyTrue indicating the next operation to be a write operation.

                      -> Write operation is done. Again change the value of iswrite.

                       

                      This needs to be done so that the value of the variable is not always constant, but instead changes with the signal asserted by the master.


                      Regards,
                      Yashwant