Thank you for the quick response. Do you agree that the diagram on page 27 should be changed to add the connection to VDDD supply to pin 37? I think pin 39 has the same issue – It needs a connection to VCCD supply as well.
Disregard that comment about pin 39 - I am not intending to power those externally - but do I need to connect both VCCD pins 39 and 86 to a 1uF cap, or just one of them? Thanks!
As mentioned in the PSoC 5LP Family Datasheet (Document Number: 001-84932 Rev. *M) Page No 9 -
1. The 2 VDDD pins (pin 37 and 88) need to be connected together externally and to the supply. You can also refer to 'Figure 2-6. Example PCB Layout for 100-pin TQFP Part for Optimal Analog Performance'. Both the pins - 37 and 88 is connected externally and to the VDDD supply.
2. The 2 VCCD pins (pin 39 and 86) must also be connected together externally with the trace between them as short as possible and a 1uF capacitor to VSSD. For further details refer to 'Section 3. Pin Descriptions' on Page 12 in the document.
Rakshith M B