5 Replies Latest reply on Sep 15, 2019 7:18 AM by ViV_4156156

    S25FL256L is it possible to write single register i mean single write and read

    ViV_4156156

      Hi,

         In S25FL256L is it possible to write single register ,I mean single write and read. Have some issues sector erase and page write

       

      Regards,

      Vignesh.V

        • 1. Re: S25FL256L is it possible to write single register i mean single write and read
          BushraH_91

          Hello,

          Can you please specify in detail what issues you are having with sector erase and page write?

           

          Thank you

          Regards,

          Bushra

          • 2. Re: S25FL256L is it possible to write single register i mean single write and read
            ViV_4156156

            Hi ,

                 Sorry for the delay in reply . The sector erase and page write seems to work when done independently.

             

            When writing within the sector I'm not getting desired results. for example I'm writing in sector 00 for 20 bytes

            now I need to write to write from 21 to 40 anyways I need to erase the sector. I'm trying to read the bytes into RAM before erase and trying to program page of the sector. here is what I have the problem. Either I shall attach the code snippet or kindly give me any project reference where this has been done.

             

            Regards,

            Vignesh.V

            • 3. Re: S25FL256L is it possible to write single register i mean single write and read
              BushraH_91

              Hello Vignesh,

               

              1. Did it fail at certain area or anywhere in the flash array? Which sector (address) the erase and PP failed in?
              2. After seeing the failure, read SR1V, SRV2, CR1V, CR2V registers value for us to further analyze.

               

               

              Regards to if possible to single write & read register, the answer is “Yes”. WRAR (71h)+Register Address, and RDAR (65h)+Register Address can access any register individually. There are also read register commands to access registers individually, i.e., RDSR1 (05h),  RDSR2 (07h), RDCR1 (35h), RDCR2 (15h), RDCR3 (33h).

               

              Thank you

              Regards,

              Bushra

              • 4. Re: S25FL256L is it possible to write single register i mean single write and read
                BushraH_91

                Hello Vigesh,

                Please refer to your email for your issue.

                 

                Thank you

                Regards,

                Bushra

                • 5. Re: S25FL256L is it possible to write single register i mean single write and read
                  ViV_4156156

                  Hi,

                     Replying to ur first question actually its not failing thats what i saw because status reads are ok..

                   

                  i think the way it needs to be handled is in the application. as follows correct me if im wrong

                   

                  Read the sector to write before every write .

                  copy to a temporary array.

                  populate the array with updated or modified values.

                  append the to be added data in the same sector onto the array.

                  now write the complete array/buffer data with updated length onto the same sector after erasingg the specific sector.

                   

                  void spi_flash_program (uint32_t address, uint8_t *p_data_bytes, uint32_t size)

                   

                  {

                         static uint32_t number_of_pages, size_of_data, last_data_block_size, counter;

                         size_of_data = size;

                         float num_of_sectors = 0;

                         if(size != 0)       {

                                num_of_sectors = size / FLASH_SCTR_SIZE_4K_256_MB;

                                int sectors_to_manipulate = 0; 

                                sectors_to_manipulate = roundNo(num_of_sectors);            

                         }

                   

                        if (size_of_data % 256)

                         {

                                number_of_pages = (size_of_data / 256) + 1;

                                last_data_block_size = size_of_data % 256;

                         }

                         else

                         {

                                number_of_pages = (size_of_data / 256);

                                last_data_block_size = 256;

                         }

                         address &= 0x00FFFF00; // address must be aligned to 256 byte !

                         for (i = 0; i < sectors_to_manipulate; i++)       {

                                spi_flash_sector_erase(address + (i * FLASH_SCTR_SIZE_4K_256_MB));

                   

                                for ( counter = 0; counter < number_of_pages - 1; counter++ )

                                {

                   

                   

                                       spi_flash_page_program ((address + 256*counter) ,(p_data_bytes +256*counter), 256);

                                }

                                // last page

                   

                                spi_flash_page_program ((address + 256*(number_of_pages - 1)) ,(p_data_bytes +256*(number_of_pages - 1)),                     last_data_block_size);

                         }

                   

                  }

                   

                   

                  void spi_flash_page_program (uint32_t address, uint8_t* p_data, uint32_t length)

                  {

                  uint8_t dummy_var;

                  uint8_t addr0, addr1, addr2;

                  uint32_t counter;

                  (void)(dummy_var);

                  addr0 = 0; // 256 byte alignment

                  addr1 = (uint8_t) ((address & 0x0000FF00) >> 8);

                  addr2 = (uint8_t) ((address & 0x00FF0000) >> 16);

                   

                   

                  ALLOW_TRANSFER; // if previous command has set EOQ

                   

                   

                  PUSH_ENQ(WREN);   // write enable command (must be done before every write !!!)

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  POP(dummy_var);

                   

                   

                  ALLOW_TRANSFER; // from this point all following write to PUSHR will be sent

                   

                   

                  PUSH(PP);    // page program command

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  POP(dummy_var);

                   

                   

                  PUSH(addr2); // most-significant byte of address

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  POP(dummy_var);

                   

                   

                  PUSH(addr1); // middle byte of address

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  POP(dummy_var);

                   

                   

                  PUSH(addr0); // least-significant byte of address

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  POP(dummy_var);

                   

                   

                      for ( counter = 0; counter < length - 1; counter++ )

                  {

                          PUSH(*p_data); // filling RxFIFO by data

                  p_data++;

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                      POP(dummy_var);

                      }

                      PUSH_ENQ(*p_data); // filling RxFIFO by data (last item)

                  p_data++;

                      WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  POP(dummy_var);

                  }

                   

                  Reg single read

                   

                   

                  im doing the following but its reading always 00.

                   

                  void read _register(uint32_t address, uint8_t* p_data)

                  {

                  static uint8_t dummy_var;

                  uint8_t addr0, addr1, addr2 addr3;

                  addr0 = (uint8_t) (address & 0x000000FF);

                  addr1 = (uint8_t) ((address & 0x0000FF00) >> 8);

                  addr2 = (uint8_t) ((address & 0x00FF0000) >> 16);

                  addr3 = (uint8_t) ((address & 0xFF000000) >> 24);

                   

                  ALLOW_TRANSFER; // if previous command has set EOQ

                   

                  PUSH(READ_DATA);  // read data bytes command

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  POP(dummy_var);

                   

                  PUSH(addr3); // most-significant byte of address

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  POP(dummy_var);

                   

                  PUSH(addr2); // middle high byte of address

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  POP(dummy_var);

                   

                  PUSH(addr1); // middle byte of address

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  POP(dummy_var);

                   

                  PUSH(addr0); // least-significant byte of address

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  POP(dummy_var);

                   

                  PUSH_ENQ(dummy_byte); // dummy bytes for generating CLK to slave

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  POP(*p_data_bytes);  // read useful data

                  }

                   

                  void write_register(uint32_t address, uint8_t* p_data)

                  {

                  static uint8_t dummy_var;

                  uint8_t addr0, addr1, addr2,addr3;

                   

                  addr0 = (uint8_t) (address & 0x000000FF);

                  addr1 = (uint8_t) ((address & 0x0000FF00) >> 8);

                  addr2 = (uint8_t) ((address & 0x00FF0000) >> 16);

                  addr3 = (uint8_t) ((address & 0xFF000000) >> 24);

                   

                  PUSH_ENQ(WREN);   // write enable command (must be done before every write !!!)

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  POP(dummy_var);

                  ALLOW_TRANSFER; // from this point all following write to PUSHR will be sent

                   

                  PUSH(WRITE_DATA);  // read data bytes command  - 0X65H

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  POP(dummy_var);

                   

                  PUSH(addr3); // most-significant byte of address

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  POP(dummy_var);

                   

                  PUSH(addr2); // middle high byte of address

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  POP(dummy_var);

                   

                  PUSH(addr1); // middle byte of address

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  POP(dummy_var);

                   

                  PUSH(addr0); // least-significant byte of address

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  POP(dummy_var);

                   

                  PUSH_ENQ(*p_data); // write data into the register

                  WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;

                  }

                   

                  i tried with following code to write a set of 10 values sored in array onto flash but im not able to get the written values when i read. can u also help on this

                  Regards,

                  Vignesh.V