The WDT_COUNTER register provides the count value of the WDT. The WDT generates an interrupt when the count value in WDT_COUNTER equals the match value stored in the WDT_MATCH register, but it does not reset the count to '0'. Instead, the WDT keeps counting until it overflows (after 0xFFFF when the resolution is set to 16 bits) and rolls back to 0. When the count value again reaches the match value, another interrupt is generated.
A bit named WDT_MATCH in the SRSS_INTR register is set whenever the WDT interrupt occurs. This interrupt must be cleared by writing a '1' to the WDT_MATCH bit in SRSS_INTR to reset the watchdog. If the firmware does not reset the WDT for two consecutive interrupts, the third match event will generate a hardware reset.
For more details on this please refer to the Watchdog Timer section of the Architecture TRM for 4000S: https://www.cypress.com/file/230701/download
Please refer to the code example: CE210292 – WDT P4S Example, for implementation of WDT for a 4000S device. I have attached the code example below.
The code example configures the WDT to generate an interrupt every 500 ms and a reset on the third unserved interrupt (1.5 seconds).
I think you have a misunderstanding.
If the interrupt is used for WDT, I think that only a runaway looping in the HardFault handler can reset the WDT because the HardFault handler priority is higher than WDT one.
Of course, a WDT reset is also possible if a loop runaway occurs in an interrupt handler higher than the priority of the WDT handler.
Therefore, the priority of the WDT handler should be the lowest.
You are correct that a WDT reset can occur if a loop runaway occurs in an interrupt handler higher than the priority of the WDT handler because the the WDT handler will not be serviced since the code is stuck in the interrupt handler of a higher priority interrupt. As a consequence of this when the WDT counter reaches the MATCH value the third time a WDT RESET occurs.
Also note that WDT Reset is also possible if the runaway condition occurs in the main loop and WDT interrupt is not cleared in the WDT Handler. Since the WDT interrupts will not be cleared in the handler, 3 consecutive interrupts will lead to WDT Reset.
Can you please confirm if you are clearing the WDT interrupt in the WDT interrupt Handler in the case when WDT reset is not happening?