3 Replies Latest reply on Sep 1, 2019 8:23 PM by BoTa_264741

    psoc 5lp pin for dual  dif adc

    PaSv_1652016

      Hello

      which pins to choose for my project
      i have:
      CY8C5888LTQ MCU

      1x differential Delta sigma ADC 18Bit  with internal vref 1.024
      1x diferential SAR adc 12bit  with internal -/+ vref 1.024

       

       

       

      In  AN58304 (PSoC 3 and PSoC 5LP Pin Selection for Analog Designs)

      the document says:

      Of these seven ports, three have a slight analog performance advantage P0[7:0], P3[7:0], and P4[7:0]. These ports reside in the analog upper portion of the chip. The analog globals, AGL[7:4] and AGR[7:4] that connect to these ports, also reside only in the upper analog section of the part, which give these ports a slight signal-to-noise ratio advantage.  

       

      Now i configure pin to next ports and analog rail:

       

       

       

      1. for best accuracy my pin  position correct  or  can I find a better solution for high accuracy?

      2. for best accuracy i need use bypass capasitors 10uF   for  all extRef pin or  only  for selected bypas capasitor port  in deltaSig component  ?  

        • 1. Re: psoc 5lp pin for dual  dif adc
          BoTa_264741

          PaSv,

          For high accuracy bypass caps are necessary both on DelSg and SAR ADCs. Importance of the reference can be demonstrated by this App Note from the Linear Technology

          https://www.analog.com/media/en/reference-design-documentation/design-notes/dn568f_web.pdf

           

          While  selecting ADCs pins is important, it is also important to bring the signal to the pins undistorted. For that, make sure that there is no high-speed digital pins next to the ADC analog inputs. Best is to set nearest pins to GND.

          /odissey1

          • 2. Re: psoc 5lp pin for dual  dif adc
            PaSv_1652016
            For high accuracy bypass caps are necessary both on DelSg and SAR ADCs.

            i add 10uF to all  pin50\pin51\pin53\pin31 extref

             

             

             

             

            from AN58304 precision pin  for  qfn68 only P0(7) (pin56 ) and p3(7) (pin37)
            But  pin56 + pin37  have inconvenient location for for differential input external layout .

            my priority external EMI immunity + max internal accuracy.

             

             

             

            which option is more profitable?

            1:
            Delta sigma  input_P  P0(7)  PIN_56

            Delta sigma  input_N  P3(7)  PIN_37

             

             

            or

            2:
            Delta sigma  input_P  P0(7)  PIN_56

            Delta sigma  input_N  P0(6)  PIN_55

             

             

            ?

            • 3. Re: psoc 5lp pin for dual  dif adc
              BoTa_264741

              1. It is enough to put only one 10u caps on each bypass connector, one for DelSig and one for SAR ADC (total 2 caps)

               

              2. Better choice is to keep input lines on the same port and on adjacent pins

              Delta sigma  input_P  P0(7)  PIN_56

              Delta sigma  input_N  P0(6)  PIN_55

               

              /odissey1

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