I don't know if this is a root cause.
You said the UART_2 uses an external clock generated by a cy_clock component.
What is the frequency of the external clock?
What is the oversampling rate of UART_2?
When UART_2 is configured as x12 oversampling rate and 460400bps baud rate, a warning appears saying "UART Tolerance exceeds recommended maximum of 2.5%" This means the UART interface may not be used for that baud rate.
Please try to change the oversampling rate to 8 for a better baud rate.
I'm sorry for mistake - UART_2 baud should be 460800 (not 460400 as i write before).
In top design it looks:
Settings of UartCLK as external clock for UART_2:
And UART_2 configuration:
It's not exacly 460800bps but still is in tolerance.
One thing - when in project is only one UART_2 use it works with buffer ok. But problem occure when i add UART_1 with that same parameters with 115200 baud.
I will try change oversampling and see what will be the effect.
Nothing change. Still that same problem - not used 128 bytes buffer but one thing is change. Not 8 bytes are stored but 9 (used SpiUartGetRxBufferSize() function).
Additional i see that second read byte is Null but should be "O" - 0x4F. In both situation is that same.
It seems that the software buffer takes long time. Can you try to use a DMA at the RX part of the UART_2?
There is a code example "DMA_UART_PSoC4" using UART with DMA.
Hello again, I am sorry for disappear for few days - short holidays.
Thank you AH_96 for sample. It looks like it solves my problem. I have no idea why in my configuration it was not working. Anyway i will use your code and adapt it to my project. let's see if it works
Thank you all for help.