Here is the merger app.
Assume that the SPI Flash used on FX3S has 1MB storage capacity. FX3S firmware size can never exceed 512KB since FX3S's RAM size is 512KB. So the application creates a new file, copies the firmware data starting from address 0, fills the empty space with 0 till address (512KB-1). And then copies FPGA config data from address 512 KB.
Assume that the FPGA config size is always 128 KB.
The output file of this application can be stored in SPI flash by booting FX3S in USB boot mode and using Control Center.
Once FX3S firmware boots and enumerates with its functionality, when FPGA Config is called in the firmware, FX3S reads FPGA config from address 512KB of SPI flash and dumps it onto FPGA. This read and write is done in block of 1024 bytes.
Note: " The attached folder contains files for merger of CX3 firmware with ISP binary file. You need to customize it for you application"
To merge the FX3S firmware file and FPGA config binary, follow the steps mentioned below:
- Open command line and navigate to project path (where the CX3-ISP-ImageMergerApp.exe is available)
- Give the command: CX3-ISP-ImageMergerApp.exe -c (Firmware_Name).img -t (FPGA_Fimrware_Name).bin -o (Output_MergedFile_Name).img
I have provided a few CX3 image files and sample bin files in the attachment.
Please refer Sample_Run.txt for the sample run.
Refer this thread for the firmware to be used with FX3SCYUSB3014 and Lattice ECP5 Flash selection
MergerApp.rar 324.8 K
thank you for this app. It works fine.
In my case the bit stream was 875 KB and my FPGA files are image.bit instead of image.bin.
But I got it merged and programmed into the FX3S.
I saw the other post from your link, it gives me a small idea, where I have to start.
I will see the SPI config functions from this project to see how I can get forward.
In my case there is not just on user pin to pull low. If you see the PDF from the first post on page 11, then I need to implement the whole process, I guess. I need to take an FX3S project and move all the SPI functionality inside and see how to realize the configuration process.
If an firmware with this process would exist for the FX3S, then that would be great for me, so I can see how it is done.
I found this post here:
There is an ECP5 instead of an ECP3, but it looks to me that the principle is the same.
Does an FX3 project exist for this board which can be provided?
Please refer to the following example of FX3 SDK:
C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\firmware\serialif_examples\cyfxusbspiregmode
It will work as base to your application, where SPI block acts as master. You need to take care of the SSN line for selecting SPI Flash and FPGA.
You can also refer to firmware which is along with AN84868 app note, it will give you idea for FPGA configuration.
We are not having any firmware which fulfills your requirement completely.