1 2 3 Previous Next 33 Replies Latest reply on Sep 6, 2019 8:31 AM by SrWu_4394436

    Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB

    SrWu_4394436

      Hi,

       

      We are using S70GL02GS in our product.  With the old u-boot version U-Boot SPL 2013.10 (Aug 05 2019 - 23:00:56) we are able to bring up the board and everything is fine.

       

      We are porting the code to newer version of u-boot(U-Boot SPL 2018.01-00569-g7b4e473842-dirty) and kernel (V4.12) and we are facing the problem in flash being recognized.

       

      Error is “## Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB”.

       

      Upon debugging we are noticing that in Flash_init() function of file drivers/mtd/cfi_flash.c, it is not able to recognize the flash.

       

      Any input on this? Please let us know.

       

      Regards

      Srinivasa

        • 1. Re: Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
          BushraH_91

          Hello Srinivasa,

           

          The S70GL02GS has two dies and is a little bit special. For Linux, I am sending you the patch (refer to attachment).

           

          For U-boot, we are still reviewing the issue. .

           

          Thank you

          Regards,

          Bushra

          • 2. Re: Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
            SrWu_4394436

            Hi Bushra,

             

            Thanks for the quick response.

             

            Sorry, I am reiterating the same question again.

             

            We have a hardware which is working with “u-boot version U-Boot SPL 2013.10” and everything is working fine with the part number “S70GL02GS”.

             

            When you say “U-boot, we are still reviewing the issue”, means that U-boot version “u-boot (U-Boot SPL 2018.01” with part number S70GL02GS” is not working at your end also and you are looking at it.

             

            I am little bit surprised.  Our thought process was since “S70GL02GS” is working with u-boot 2013.10, it should work with U-boot 2018.01.  If you have any challenges making S70GL02GS work with U-boot 2018.01, please let us know, we need to communicate with our customer also on this.

             

            Regards

            Srinivasa

            • 3. Re: Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
              BushraH_91

              Hello Srinivasa,

              U-boot, we are still reviewing the issue”, means we were looking into your inquiry.

              It is very strange that you see the issue after migrating newer version of u-boot because there are no major changes in the driver/mtd/cfi_flash.c.

              Could you please enable debug() print in the u-boot to collect detailed information and send it to us?

               

               

              Thank you

              Regards,

              Bushra

              • 4. Re: Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
                SrWu_4394436

                Hi Bushra,

                 

                Processor is trying to send commands via function "flash_write_cmd".  In this function, it generates address address based on the offset and the port width.  Next it generates in this function, it generates proper sized command based on the port and chip widths.

                 

                I have enabled below statement in function flash_write_cmd:

                 

                debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);

                 

                Address, cmd, and port width are not same in working u-boot and not working uboot!!!

                Surprisingly sometimes in not working u-boot chipwidth is sometimes 32 bit!!!!

                 

                In the working code, it enters "flash_write_cmd" function for about 4110 times where as in Not working u-boot it enters 20 times and somewhere in between it fails and exits?

                 

                Why is generated Address, cmd, and chipwidth is not uniform in both cases?

                 

                Does the flash_info_t *info is being updated properly?

                 

                 

                Please find the logs attached for working and not working code.

                If you need any other info, please let me know.

                 

                Reply

                • 5. Re: Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
                  TakahiroK_16

                  Hi Srinivasa,

                   

                  Thank you for providing the logs.

                   

                  Please see the flash_detect_cfi() in the drivers/mtd/cfi_flash.c. The u-boot tries to detect the Flash by changing chipwidth and portwidth. Once the expected CFI "QRY" keywords are detected, the chipwidth and portwidth are determined (I think it is 16bit x 16bit in your system). In your Not_Working log, both chipwidth and portwidth reaches to 32-bit without detecting expected QRY keywords.

                   

                  I assume that you are using the same hardware and just migrated the u-boot software between Working and Not Working. I would suggest to verify/compare your u-boot configurations (.config) between the Working and Not Working. The GPMC configuration looks same. How about the MMU and/or Cache configuration? I could see the "Caches not enabled" message in the Working log. If the cache is enabled in the Not Working and the Flash address is configured as cache-able region, the accesses to the Flash may not be performed correctly.

                   

                  Thanks,

                  Takahiro

                  • 6. Re: Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
                    SrWu_4394436

                    Hi Takahiro,

                     

                    Yes, we are using same hardware and just migrated the u-boot software between Working and Not Working. Sure, we will verify/compare .config files.

                    I did not touch MMU and Cache related code.  My understanding says that it disabled in U-boot.

                     

                    We have updated .dts file with respect to NOR flash.  Can you please review the only the NOR related changes and give your feedback?  Also, TI representative was suggesting getting all timing parameters from Cypress.  Please provide timing parameters that are in &gpmc node (line 287 to 371).

                     

                    Regards

                    Srinivasa

                    • 7. Re: Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
                      TakahiroK_16

                      Hi Srinivasa,

                       

                      I assume the dts file you attached is the one for Not Working. Could you send the dts for Working one?

                      I'm confused about the pinmux settings from line#78. This looks like for Address and Data multiplexed memory. The GL-S family is Non-multiplexed memory. You need to assign all of A1 to A27, however, the dts only setting for A1 to A10, and A27.

                       

                      Regarding the timing parameters, please find the AC Characteristics section in the datasheet:

                      https://www.cypress.com/file/177976/download

                      S70GL02GS is the dual die stack of S29GL01GS.

                       

                      Thanks,

                      Takahiro

                      • 8. Re: Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
                        SrWu_4394436

                        Hi Takahiro,

                         

                        Yes, I have attached dts file of non-working board only.  We are migrating from U-boot (V2013) to U-boot (V2018).    We have working hardware with old version of U-boot (V2013) and in this version of U-boot we did not have .dts concept, so I don’t have dts file for working one.

                         

                        By referring to old board’s mux.c, we have written new dts file.  I am attaching the C code of the old working code and from that it is clear that we are using multiplexed address and data lines.  From the code attached and as you mentioned we are using multiplexed Address Data 16-bit device.

                         

                        Since old code is working fine, now I am surprised with your statement “The GL-S family is Non-multiplexed memory”.  Are you sure on this?

                        Next my question will be how come old code is working with multiplexed address and data line (A/D0 to A/D15)?

                         

                        Regards

                        Srinivasa

                        • 9. Re: Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
                          TakahiroK_16

                          Hi Srinivasa,

                           

                          Yes, I'm sure. Please refer to the datasheet. The Address (A26-A0) and Data (DQ15-DQ0) are independent (not multiplexed).

                           

                          In your old code, probably the multiplexed configuration is overwritten by non-multiplexed one at some point...

                          I think you can check actual pinmux register value by 'md' command in u-boot. And you may want to check the schematic to verify how the SoC and the Flash are connected.

                           

                          Thanks,

                          Takahiro

                          • 10. Re: Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
                            SrWu_4394436

                            Hi Takahiro,

                             

                            Thanks for quick response.

                             

                            Just verified with the schematics of our board.  We have below in our schematics:

                             

                            • AD0 – AD15 going directly from processor to NOR Flash.
                            • ALE signal going to D-latch and which controls the selection of address/data to flash.
                            • A16 – A26 going from processor to NOR flash via Isolation switch.
                            • Control signals going directly from processor to NOR flash.

                             

                            For sure, I don’t see separate lines (A26–A0) & (DQ15–DQ0) going from processor to NOR flash directly. 

                             

                            From the schematics, it must be multiplexed address and data lines for our board.  I cannot share our schematics on the public forum.

                             

                            Please confirm if there is any other version of this chip.

                             

                            Regards

                            Srinivasa

                            • 11. Re: Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
                              SrWu_4394436

                              Hi Takahiro,

                               

                              From the NOR flash point of view, you are correct.  Address and data lines are NOT multiplexed.  From the processor point of view, address and data are multiplexed.  GPMC should take care of this.

                               

                              Attaching the GPMC part of the processor

                               

                              Regards

                              Srinivasa

                              • 12. Re: Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
                                SrWu_4394436

                                Hi Takahiro,

                                 

                                I have made little progress on this.  Now I can get response to “QRY” keywords.  Next it’s trying to fetch vendor and it fails. Error message is “CFI: Unknown command set 0x1402”.

                                 

                                I have captured logs for both working and not working u-boot please find files attached.

                                 

                                Since dts file is on the processor side (AM335X) and we are clear there is multiplexing at processor end.  Now I am suspecting on the dts file because I have verified all other aspects and dts has become a kind of black box to me.

                                 

                                Considering this do you have any reference working dts file for us.   In the dts file, I am ok with the pin-muxing side (line 78 to 116).  Since you don't have schematics, you can ignore this.   I am attaching my dts file again.  I am not sure what  is going on at node & gpmc (line 225 to 276).  TI guys say, you have to get input from CYPRESS team.

                                We are operating in "16-Bit Address/Data-Multiplexed Memory" mode as explained in Section 7.1.2.2 of TRM. 

                                 

                                If you need any further input from me, please let me know.

                                 

                                Regards

                                Srinivasa

                                • 13. Re: Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
                                  TakahiroK_16

                                  Hi Srinivasa,

                                   

                                  I understand that you are using an external D-latch component between SoC and Flash, to interconnect the Addr/Data Multiplex (ADM) host and Addr/Data Parallel (ADP) memory.

                                   

                                  In your NOT_WORKING log file, I could find (line#503):

                                       Value of qry.p_id : 5122

                                       Value of qry.p_adr : 5696

                                  5122 = 0x1402 and 5696 = 0x1640. They look like address + data in the CFI table.

                                  I think the host reads out the address that output from the host as data. I would suggest to verify the DTS configuration for the D-latch (CLK, timing, etc...).

                                   

                                  Thanks,

                                  Takahiro

                                  • 14. Re: Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
                                    SrWu_4394436

                                    Hi Takahiro,

                                     

                                    Thank you very much on your input.

                                    We changed #define STNOR_GPMC_`CONFIG1 from 0x00001200 to 0x00001210 and everything is working fine i.e) increased to 1h = x2 latencies.

                                     

                                    We have Kernel versin 4.14 and as per my understanding goes, we need to do changes only in .dts file.  Since we don't have any board file in kernel ( as compared to older versions).  I have ported all NOR flash related changes from u-boot to kernel.  I am not seeing anything related to NOR flash in kernel.

                                     

                                    On powerup, omap_hwmod.c file in Kernel scans for all nodes and gpmc is being displayed as below:

                                     

                                    [    0.139039] Srini debug @ line 2494 in function _init in file arch/arm/mach-omap2/omap_hwmod.c

                                    [    0.139068] hw name: gpmc

                                     

                                    How to we know NOR flash is detected in kernel?

                                    Is there anything additional changes (other than dts) we need to in kernel?

                                     

                                    Please let us know your input on this.

                                     

                                    I have attached kernel log for reference.

                                     

                                    Regards

                                    Srinivasa

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