1 Reply Latest reply on Aug 28, 2019 5:12 AM by ChZo_4377001

    Margin Mode CYT2B98CAAES

    ChZo_4377001

      We (ProMik GmbH) are a provider for flashing stations and flashing tools. For one of our customers we need to implement a driver that is capable of erasing and flashing data into the flashes of a traveo II device (here: CYT2B98CAAES). The verification of a successful flashing should be done via different margin modes.

       

      We are able to catch the MCU when the device is powering up. Via DAP we are putting our bootloader into SRAM and let it run (on the application core - Cortex M4). We are using IPC for the syscalls which are described in the technical reference manual and in the programming spec.

      Using the syscalls, we are able to gather all of the device's IDs (e.g. family ID, revision ID, etc.), blankchecking workflash, erasing sectors or all the cflash, and programming data into code flash and work flash.

       

      Yet, when we want to verify the programmed data, we are running into problems.

      We have implemented two different verification methods. One is doing a checksum compare, the other one is a data compare.

      Both methods are working perfectly fine when not entering margin mode.

      Even when calling "exit margin mode" routine beforehand, we are not having any troubles.

       

      But, when we want to enter margin mode problems arise.

      1) Data read do not match data written beforehand

      2) When calling any other syscall after entering margin mode, our bootloader is not responding anymore. Exchanging data via DAP is still possible, but the application core is not responding anymore.

       

      If we do not receive a response from the core anymore and readout the IPC_INT_STRUCT afterwards, we see values, that are not set, when a syscall is successful.

      (in error state, IPC_INTR, IPC_INTR_SET, IPC_INTR_MASKED show 0x00000200 and IPC_INTR_MASK has the value 0x00000700)

      (if everything runs OK, IPC_INTR, IPC_INTR_SET, IPC_INTR_MASKED show 0x00000000 and IPC_INTR_MASK has the value 0x00000700)

       

      We have tested with several different combinations of parameters (e.g. DCS_TRIM_EN = 0, RD_REG_TRIM = 0, RD_REG_EN = 0), yet we encounter the same behaviour.

       

      Where can we find additional information about the parameters?

      Are we missing any prerequisities? Before entering margin mode?

       

      We appreciate any help,

      thanks in advance

        • 1. Re: Margin Mode CYT2B98CAAES
          ChZo_4377001

          Problem is solved.

           

          For an increased performance we increased clk_hf, which then was higher than the max operating frequency of the flash memory.

          We have increased the wait cycles accordingly and do not run into further problems anymore.

           

          Thank you Cypress support for your help, your hint got us the solution.