Thank you for contacting Cypress Semiconductor.
Unfortunately we do not have any parallel device with lesser read cycle time. But I would like to point out that the page access time for GL-S family of devices is considerably less (20ns).
Hi Apurva ,
Thanks for providing the information , I am using the NOR FLASH for implementing on our project for first time .
I have been through using LLD from CYPRESS to Erase and Reprogram the device using 2 methods one without buffer utilization at 4KBps programming speed and second one using 512 Bytes Buffer and achieved speed of 256 KBps Flashing writing speed .
Similar to this you are mentioning PAGE ACCESS time what is the PAGE ACCESS time 20ns or 15ns .
Can you point to an example or API or Training material on the PAGE ACCESS ? .
Thanks in advance
Since the part number mentioned by you is a tACC = 100ns device, the page access (tPACC) time will be 25ns. Apologies for mentioning it wrongly as 20ns in my previous post.
You can read about page mode read on page 19 of the datasheet (https://www.cypress.com/file/177976/download ).
Please let me know if you need any further clarification.