You may mix up with the software watchdog reset and Deep Standby mode.
Even though the software watchdog reset happens, SRAM0/1/2 can be retained with values just before the reset.
In Deep Standby mode, the power supply for SRAM0/1/2 is turned off inside device. that mean that SRAM0/1/2 are not retained in this mode.
Note that if DSRAMR is configured as the contents of SRAM2 is retained, SRAM2 is retained even in Deep Standby mode.
Thank you for your reply!