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PLL and ILO are not synchronized. But PSoC5 can supply multiple synchronized clocks derived from PLL/MASTER_CLOCK. Internal clock divider is 16-bit, so starting with 48Hz MASTER_CLOCK one can derive clock as low as ~740 Hz. To assist you better, please describe exactly what clocks are required for operating your custom analog block.
Thanks for reply!
Clock requirements are from Hz range to MHz range. Actually I want to design generalized data acquisition system in which External unit is variable so accordingly clocking frequency is variable.