If you want to get the sensor Cp, you can use component Built in self test function.
Cs represent the sum of parasitic capacitance and finger capacitace.
The unit of the Cs is f.
Fsw equals to the HFCLK/sensor clock divider.
If you want to know more about the CapSense , you can refer to below linker file CapSense Desing guide:
The doc clarifies how to set the system parameter.
Hope it can be helpful for you.
Thank you for your reply.
I have checked all the parameters in my Cypress but there is something that is still not clear.
I'm using the Capsense v6, I have a PCB with 4 copper buttons connected to the Cypress and I'm using these parameters:
Imod 29; Icomp 25; Vref 1.2 V; Fsw (HFClk) 12 MHz; n 16 bit.
During the measurements I have a Cp of 105 pF (measured with CapSense_GetSensorCapacitance), without a finger I'm expecting to have more or less the same result from the formula but the calculation with these parameters results Cs = 2.97E-06. What I'm doing wrong?
Any other answer to my reply? Do you know why the formula is not working?
I doubt that the value of Cp 105 is wrong.
Do you enable any filters in your project?
In sourcing mode:
raw count = 2N * VREF* FSW*CS/ IMOD − 2N * ICOMP/ IMOD
In sinking mode:
raw count = 2N * (VDD − VREF)* FSW * CS /IMOD− 2N * ICOMP/ IMOD
I think that 105 pF is the right capacity, it is what I expect from the sensor design and it is similar to a measurement taken using an impedance
In the formula, I didn't multiply Imod and Icomp by 1.2 but in any case, the result that I obtain is no sense: 3.56E-06 is too high!
I'm using the IIR filter of the 1st order and I have the self-test library activated to measure the Cp. I have the IDAC sourcing mode.
The data that I'm using in the formula are the same as before:
Imod = 29
Icomp = 25
Fsw = 12000000
Vref = 1.2
n = 16
Rawcount = 40000
The result is wrong with some order of difference (E-04), I think that some number that I put in the formula is wrong... perhaps Fsw?
I have a problem similar to yours.
I think that Fsw is not equal to 12 000 kHz but lower because Fsw it is the frequency of the sense clock, not the modulator clock.
(Could be 6000-3000-1500-750-375.... kHz)
Thank you for the reply. I think the same, Fsw should be the Sense Clock Frequency as written in the document No. 001-64846 Rev. *X but the formula is still not working. Starting from the Rawcount formula with Idac in sourcing mode:
Cs = (Imod*Rawcount)/((2N-1)*Vref*Fsw) + Icomp/(Vref*Fsw)
So with my values (using Fsw = 750 KHz instead of the Modulator clock frequency) I obtain Cs = 5,69E-05 F that is really far from 105 pF (the parassitic capacitance read by Cypress, Cf is 0 because there isn't any finger over the sensor).
I'm quite sure about Imod, Icomp, N because are set by me with the tuner and I can read that values during the measurements... Vref is fixed at 1.2 so I think that Fsw is something different to have the formula working... But I don't understand what could be the right value. Or is the formula that is wrong.
I hope that someone from Cypress' team can help us soon.
1. PSoC 4000 device has 3rd gen CapSense in it. The supported parasitic capacitance is only from 5 - 60 pF. 105 pF is too high value of Cp for this device. Could you please let us know the dimensions of the button, trace width and trace length.
2. Can you please check the if you are using auto mode/ PRS as sense clock source? If yes, you need to use the avg sense clock frequency as displayed by the component which is Fsw/ 2. To avoid confusion you can use direct method and use the same Fsw. Also while measuring Cp make sure you have set sense clock as direct.
3. Could you please provide the raw counts that you obtained so that we can back calculate it from our side and compare our results.
1 of 1 people found this helpful
Well, I have set up the following configuration:
- CYCKIT040 using the following hardware config:
22.3 pf capacitor connected between pin p0 and pcb ground as "Verification capacitor"
- Formula used, according to CYPRESS documentation 0001-85931
Raw Counts =(Max_Counts*Vref*Fsw*1000*Cs)/(Imod*1000000000000)-(Max_Counts*Icomp/Imod)
Purpose is to check if the Raw counts correctly processed gives the right value of the known capacitor.
1000 is a conversion factor from (kHz <> Hz)
1000000000000 is another conversion factor (pf <> F)
Imod= 0.0000192 (Amps here)
Icomp=0.0000156 (Amps here)
Thanks to the one that will bring me the light of knowledge !
1 of 1 people found this helpful
One observation from your screenshot. CMOD is connected to 0.4 in the kit CY8CKIT-040. You have used 1.6 pin Can you please check that once?
Can you please turn on IDAC auto calibration and then check your IDAC values as reported in the tuner. Use these values for comp IDAC and mod IDAC. But the auto calibration routine will set the mod IDAC and comp IDAC to 85 %. I can see that you have set it to around 23 %. It is recommended to set calibration percent to 85 %. Also there are issues with mod IDAC values less than 20. Please set mod IDAC values greater than 20 and then set the comp IDAC to get 85 % of max raw counts.
CMOD is now connected on P0. Then I set IDAC autocalibration to ON, compile, flash and launch tuner.
I got Imod=16 and Icomp=14 and Raw counts= 0 !
It seems that the calibration routine has given me values lower then 20.
Then, I just turned IDAC autocalibration to OFF, keeping Imod=16 and Icomp=14. After compile and flash, I got Raw counts=55 !
Still stuck for the present time.
Now, will make another test following this:
Please set mod IDAC values greater than 20 and then set the comp IDAC to get 85 % of max raw counts.
So, 22.3 pF capacitor still in place with following setting:
then, Imod is set to 21 and Icomp is increased until getting around 6963 counts on the graph
In this case, when Icomp=9 we have a raw count of 6993, which is close to 6963. (85% limit)
Formula 3-8 from manual 0001-85931 gives 3013 counts, which is not correct !!
Any idea ?
Any expert from Cypress here ?