2 Replies Latest reply on Jul 28, 2019 9:47 PM by AlakanandaB_86

    Abnormally high power consumption on CYBLE-012011-00 module

    ryde_2285491

      I've been trying to track down an ongoing issue that we're having with a prototype using the CYBLE-012011-00 module and was wondering if anyone could provide some guidance with regards to troubleshooting.

       

      For some reason, we've been completely unable to get the module to pull below about ~800uA no matter what sleep modes, clock settings, or other low-power methods are used. We had initially started with a proper BLE test application on a fully populated board with the low-power arrangements recommended in AN92584 (as well as the usual suspects like setting the debug pins to GPIO) but were still getting abnormally high consumption. This has gradually been whittled down all the way to the most bare-minimum test setup as we attempted to trace the excessive power consumption, leaving us with the following:

       

      • The test board was populated exclusively with the CYBLE-012011 module and datasheet-recommended ferrite beads on the VDD/VDDR lines. All other circuitry was omitted, including the GPIO/SPI connections, onboard voltage regulator, analog circuitry, etc.
      • As there is no power circuitry, the board is powered directly from a standard linear bench supply.
      • A test application with no components of any kind was loaded, all clocks except IMO deactivated, and only the following code:

       

      int main (void)
      {
          CySysClkEcoStop(); // just in case it's somehow still active despite the PSoC Creator settings
          CySysClkWcoStop();
          CySysClkIloStop();
         
          while(1)
              CySysPmDeepSleep(); // similar results with CySysPmHibernate(), consumption is very marginally lower

      }

       

      Based on the other documentation, my understanding is that the "unused" pins should all default to high-impedance analog mode, which is the lowest possible power state for them as well. In addition, the debugging pins are set to GPIO mode and the WDT is disabled in PSoC Creator, and interrupts are never enabled.

       

      The system was tested under the conditions above at 5.0V and 3.3V (with an appropriate adjustment of the System > Operating Conditions settings in PSoC Creator), and the lowest current observed was slightly below 800uA. I'm not seeing any similarity between that value and any of the typical currents values given in the datasheet's DC specifications, although most of them are blank on this particular module's datasheet so I suppose that's not necessarily indicative of anything. We've even tried using one of the little uCurrent modules instead of the bench meter for a second opinion, with largely identical results (+/- the burden voltage difference's effect, basically). The IMO clock was tested at various speeds with essentially no effect.

       

      At this point I'm at a bit of a loss, as we've essentially run out of possibilities to troubleshoot as the most minimalist test setup we've tried is still pulling over 100 times the expected current. Is there anything obvious here that we might have overlooked, or anything that might be advisable to further investigate?