1 Reply Latest reply on Jul 16, 2019 11:53 PM by YuxianL_01

    Unaligned Usage Fault on "strh r5,[r0,#0x1]" instruction when MPU is enabled

    sosuc_4336571

      MicroController: Cypress TV-II-B-H-8M-176-CPU

      Compiler: GHS 2017.1.4

      Debugger: Lauterbach Trace32

       

      Instruction causing issue: strh r5,[r0,#0x1]

      (This Compiler generating Instruction is accessing a 64 bit variable of a struct, which is most probably unaligned due to struct packing. Packing of the struct is due to Compiler Optimizations).

       

       

      Register state:

       

      After executing this Instruction:

       

       

      Issue Disappears if:
      MPU is disabled through debugger at this instruction and reenabled after this instruction.

      Also if I use the "-no_misalign_pack" compiler flag this instruction does not generate and no issue occurs. But the Customer does not like this flag.

       

      According to CortexM7 Generic User Guide, this should not happen for "strh" instruction.

       

      Kindly suggest if any further detail is required, Thanks.