5 Replies Latest reply on Jul 1, 2019 5:57 AM by YatheeshK_36

    step by step procedure to program CY68013A device as Slave FIFO FPGA as Master

    PaKu_3818476

      hello, I need to get data from FPGA (vetex -5 , XC5VLX110) to PC.  I am Using Keil for creating .hex file . I want to know how to program CY68013A and How to get data from FPGA ...I am new to this process. Initially I tried using USB control center programming RAM but i am getting all Zeros as output, I am not sure whether that is working proprerly or not .. So I want step by step procedure of programming CY68013A and getting the data from FPGA to PC. if possible explain how to get data from FPGA using Bulkloop_VCS application...

        • 1. Re: step by step procedure to program CY68013A device as Slave FIFO FPGA as Master
          YatheeshK_36

          Hello Pavan,

           

          Please refer to this application note which is suitable for your application, it configures FX2LP in slave FIFO mode and Xilinx Spartan 6 FPGA as Master.

          You can use the control center application to make a data/file-out transfer or a data/file-in transfer by choosing the respective endpoints.

           

          The Bulkloop example will loop back the data sent by just moving the packet from the OUT buffer to the IN buffer and transmitting the data back to the host. Here the ports are not configured to interface with an external master. So, it is not possible to get data from an external master just by using bulkloop firmware.

           

           

          Best Regards,

          Yatheesh

          • 2. Re: step by step procedure to program CY68013A device as Slave FIFO FPGA as Master
            PaKu_3818476

            thank you for your reply .. but i want know whether i have to program the RAM using USB control center or i have to load the program using Cyconsole. AND i am using the same application notes as reference and i modified the slave.c using keil according to my connections. I am in confusion about whether the  EEPROM has to program with slave.iic file or not. and how to generate that .IIC file using keil I am unable to find how to generate. please if you know anything share with me.

            • 3. Re: step by step procedure to program CY68013A device as Slave FIFO FPGA as Master
              YatheeshK_36

              Hello Pavan,

               

              Please refer to the EZ-USB Development Kit User Guide in the documentations folder (C:\Cypress\USB\CY3684_EZ-USB_FX2LP_DVK\1.1\Documentation) Section 5.8 which describes how to use the hex2bix utility to convert a .hex file to .iic file automatically at the end of every build operation.

               

              Programming RAM directly will erase the content after every reset of the device. You can program the larger EEPROM so that the firmware is automatically loaded on every reset of the device.

               

              Best Regards,

              Yatheesh

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              • 4. Re: step by step procedure to program CY68013A device as Slave FIFO FPGA as Master
                PaKu_3818476

                thank you for your reply. but i am not using the fx2lp developement kit . because in my FPGA boad itself has CY68013A with USB connection. so I just need to program the CY68013A for getting the data from FPGA . i am using Cyprees USB SUITE 3.4.7. so with the given example in cypress site for spartan 6  i am able to modify the slave.c. but I need to understand whether I have to program EEPROM or not. because in the documentation there is no mention about it. so If I have to program EEPROM I have to generate .IIC file with KEIL. that procedure i want to know.

                • 5. Re: step by step procedure to program CY68013A device as Slave FIFO FPGA as Master
                  YatheeshK_36

                  Hello Pavan,

                   

                  As i mentioned in the previous reply .iic file for a program can be obtained by following the procedure in EZ-USB Development Kit User Guide : Section 5.8 which uses hex2bix.exe to convert the hex file produced by the Keil IDE to .iic file during the build.

                  You can find the hex2bix.exe in bulkloop firmware examples. Copy the exe from bulkloop firmware example to the file which contains your keil project and follow the steps mentioned in Section 5.8.

                  After this, once you build your keil project the .iic file (and the .hex) is created in the same file which contains your project.

                  You can use this .iic file to program the EEPROM which is attached to the I2C lines of FX2LP.

                  Make sure that the EEPROM has sufficient space to hold the device firmware.

                   

                  If you do not program the EEPROM and just program the RAM, then on reset of the device (or power off) the program contents in the RAM is lost and the RAM has to be reprogrammed.

                  If the EEPROM is programmed with the required firmware (program) then on every reset (or power off and on) the firmware is loaded to RAM from the EEPROM, this way you need not program the firmware repeatedly on every reset.

                  FX2LP bootloader is designed in a such a way that if EEPROM is not connected to it, then it will load the firmware from the RAM, if only RAM is programmed.

                   

                  Please do program the EEPROM connected to the device (FX2LP) with the required firmware.

                   

                  Best Regards,

                  Yatheesh

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