I think that it might be processing by debugger.
Apology for late response...
Could you please let us know where "errno.h" comes from?
if you have not modify "Cm0plusStart.c", Ram Interrupt vector is used.
And, "IntDefaultHandler" function is registered for all exceptions except "Rest".
if you faces an exception (i.e. "IntDefaultHandler" is called), you can see xPSR register in "IntDefaultHandler" to understand what happened.
I think HardFault would be occurred in your case.
Regarding xPSR register, please refer to the ARM documentation or PSoC 4S Architecture TRM.
Table 4-3. Cortex-M0+ PSR Bit Assignments