You can get a 48 MHz clock through proper settings in PSoC creator. I have attached the figure below (for psoc 63):
Can you please share screenshot of the settings you have made.
In PSoC 6 CLK_HF is used for USB:
However, PSoC 63 does not have USB Component.
When the USB component is present in case of other PSoC 6 devices, USB SOF can be used to trim IMO in order to provide accuracy of +/-0.25 percent.
we are using PLL to generate 150MHz system clock (150MHz isn't a strict requirement we can go with anything over 140MHz).
Is proposed FLL accuracy 2.4% (depicted in your screenshot) good enough for the USB device? It is greater than 0.25% required by the USB host. However, we cannot find clock requirements for the USB device (as mentioned in the main question). To be clear our product will only support USB device.
We are using PDL directly without PSoC Creator/Modus Toolbox which means that we can use the USB device on a PSoC63. We already know that USB is working but we aren't sure if FLL 2% accuracy is good enough and will not cause any issue in production.
1 of 1 people found this helpful
The USB specification governs the device clock accuracy of 12Mbps +/- 0.25% (2500ppm), see section 7.1.11 Data Signaling Rate (pg.159) of USB 2.0 specification for more details.