2 Replies Latest reply on Jun 26, 2019 8:10 AM by gehoc_941551

    Best Interface for FPGA



      Till now we have used PCIe x4 Gen2 or USB 2.0 STM32Fx microcontroller to interface our T&M products, which use Serie7 XILINX FPGAs and high speed ADC/DAC circuits. To extend the portable sector we would like to combine your FX3 USB 3.0 Solution and our FPGA/ADC/DAC systems. Although carefully reading through the FX3 reference manual it is not yet clear to us which  GPIF II interface to use.

      We have typically several (up to 128 32-Bit registers) in the FPGA for configuration, and ring-buffers (with or without DDR3) as intermediate memory. We would like to use GPIF II with it's maximum bandwidth to stream data down and/or up. Since we have clock domain crossing anyway, we can implement master or slave mode into the FPGA.

      Some applications may need continuous streaming others for example the transfer of 512 MB of DDR3 memory content after the instruments sampling has finished. Synchronous tranfer is mandatory for this. In some application up and down streaming needs to be domne quasi-simultaneos. In our PCIe solutions we use several DMA controllers to stream data to the PC / from the PC memory.

      What kind of interface would you recommend for our applications, how to program FPGA internal registers (if not done with SPI or equivalent).

      GPIF-II Master od Slave mode? ADMUX or FIFO mode?.

      We need no FX3 based data sorting or alike. Simple brute force data to PC streaming and/or up-streaming. Using 32 Byte alignment.

      Can you give us some suggestions?

      Thank you in advance!


      With kind regards,


      Gerhard Hofbauer.