7 Replies Latest reply on Jul 15, 2019 10:54 PM by JobinT_31

    PSoC5LP Direct mode and Sync mode of Control Registor




      We would like to confirm for mode of contorl registor.

      Because the detailed timing is not described in the data sheet.


      We understand that direct mode is output at the edge of the master clock when it is set asynchronously from the CPU.


      We understand that Sync mode is output on the rising edge of the clock.

      The master clock and clock are asynchronous.


      Is the recognition so far correct?



      Use Sync mode,
      What happens if the clock input to Sync mode is synchronized to the master clock?


      (a) Output in synchronization with the master clock and the clock.(Blue line)
      (b) The master clock and clock can not be synchronized, so It is output at the clock after the master clock.(Red line)

      (c) (a) or (b) operation, Is it prohibited to synchronize the master clock and the clock because it is metastable?