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- Please let know which firmware you are using to send the data.
- What is the DMA channel buffer size and count in the firmware that you are using.
- Are the DMA buffers committed automatically/ manually in the firmware?
- In case of using manual channels, are there any failures on DMA related APIs?
The firmware is that in AN84868. I have solved the problem by set the maximum allowed transfer time to 20 seconds. The firmware receives a packet of data and configure the data to FPGA and then receive another packet. The transfer takes actually less then 1 second. Most time of the 20 seconds is consumed in configuring FPGA by SPI interface. I find data are configure by Byte to FPGA. Significant waiting time exists between 2 consequent byte. My further question is how to accelerate the configuration. I think there are two ways. 1) I can choose to transfer up to 4 bytes without waiting time by setting of SPI interface. 2) I can increase the SPI transfer frequency to 33MHz described in the datasheet. Is there any other way?