Please check if the controller SPI mode is set correctly (0 or 3).
Write to memory is opcode 0x02 and write to status register is 0x01. If by any chance opcode 0x02 is right shifted by 1 during the transmission, the device would latch wrong opcode and end up executing the SR write, instead of memory write.
To further verify, if memory write causes register write in FRAM, you can try with the following:
1- Write SR with data 0x08; read and verify
2- Write to memory with 0x00 data pattern at address location 0. If the memory write falsely triggers register write then read SR will return 0x00. Reading memory from 0 will return with old content.
3- Repeat step 2 with write to memory with 0xFF pattern at location 0. If the memory write falsely triggers register write then read SR will return 0x8C. Reading memory from 0 will return with old content.
When you execute memory read after intended write, does it return the same old data or does read data change?