CYUSB301X Slave FIFO Read mode

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tohec_4273941
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I am reading the datasheet of CYUSB301X, page 25, Figure 11. Synchronous Slave FIFO Read Mode. I have one question regarding the firs tACCD in the diagram while a single read to the FIFO address "An".  Is it a mistake of the datasheet of the position of the tACCD that should start from SLRDn to the first valid "Data Out"?

Is there any timing requirement on asserting SLOEn signal?

Thanks,

-Tom

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Answer from the support team:

Hello Tom, 

Thank you for contacting Cypress Technical Support. Yes, tACCD is marked mistakenly  from FLAGA to SLRD. It is supposed to be SLRD to Data Out. Thank you so much for notifying the mistake to us. We will correct this in next revision.  There is no timing requirement on asserting SLOEn signal. Please let me know if you have any further queries.  Regards, Sridhar

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tohec_4273941
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Answer from the support team:

Hello Tom, 

Thank you for contacting Cypress Technical Support. Yes, tACCD is marked mistakenly  from FLAGA to SLRD. It is supposed to be SLRD to Data Out. Thank you so much for notifying the mistake to us. We will correct this in next revision.  There is no timing requirement on asserting SLOEn signal. Please let me know if you have any further queries.  Regards, Sridhar
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