CY8C21X34 uses first generation CSD structure( with Rbleed resistor). In this structure, Vref connected to delta-sigma comparator is adjustable based on the component config (Reference and Ref Value parameter). Hence CMOD voltage not being equal to 1.2 V is expected.
CMOD pin will be shorted to GND to fully discharge. Hence the negative pulse, at the end of each scan cycle is also expected.