1 Reply Latest reply on May 29, 2019 6:25 PM by XiaoweiZ_71

    setup timing violation of UART

    mamac_285711

      Hello Everyone,

       

      I Built the one project , It have capsense, I2c , UART, timer blocks but i found the one warning like setup timing violation of cyHFclk.

       

      please tell me how to avoid this warning. (should i worried about it?)

       

      Timing details attached with this case.

       

      thanks ,

      Manish