1 2 Previous Next 15 Replies Latest reply on Jun 21, 2019 3:57 AM by BragadeeshV_41

    what voltage wave can I see at Cmod?

    befic_2639911

      Hi,

           I am using CE210709 in the CY8CKIT-145-4045S board.

           the slider will be scaned by 4045s. according to the CSD woring principle,there will have a voltage wave ,triangular wave,at the Cmod.

           but i saw nothing but a flat signal.

          

        • 1. Re: what voltage wave can I see at Cmod?
          BragadeeshV_41

          befic_2639911,

           

          Can you increase the time scale and check for the rising and falling of the Cmod voltage. If the time base is less, you may not be able to see the actual waveform.

          CMod waveform:

           

          Regards,

          Bragadeesh

          • 2. Re: what voltage wave can I see at Cmod?
            befic_2639911

            Hi,Bragadeesh.

                 I grasp the signal again using CE210709 in the CY8CKIT-145-4045S board.  CSD  sense clock source is changed to be direct clock.

            I got the following figure. Blue signal is voltage in Cm.Green is voltage in Cx.

                 It seems no any difference whether finger touches or not.

                 Are you sure your wave is from 4045S ?

             

                Cm.pngCm2.png

            • 3. Re: what voltage wave can I see at Cmod?
              BragadeeshV_41

              Hi befic_2639911,

               

              The sensor Cp is around 5 to 45 pF and that of the cmod is 2.2 nF. The finger capacitance that you add is very less when compared to the cmod capacitance. So when the finger is placed on the button, the amount of charge taken by the sensor with finger from the Cmod capacitor is very less that you won't be able to see the changes in the cmod voltage. But our Capsense IP can detect this and produce corresponding raw count.

               

              Regards,

              Bragadeesh

              • 4. Re: what voltage wave can I see at Cmod?
                befic_2639911

                Hi,Bragadeesh:

                     Thank you for your response.

                     According to your message, I connect the touch pad with a Dupont Line, and touch the bare metal of the line.

                Then Cp is bigger,and takes more charge from Cmod,just as the below figure shows.It is apparent.

                     In this figure,Cmod voltage drops to almost 1V from 2V. The Cmod will compare with Vref of comparator in capsense.  So ,does it mean that raw count is got while Cmod is below Vref which is 2V.

                     When no finger touches,Cmod voltage rises and falls around Vref,so comparator outputs pulses to enable raw count when Cmod voltage is low than Vref.

                     when finger toucher,Cmod voltage will be low than Vref more times.so comparator outputs longer pulses to enable count to get a bigger raw count.

                     does it work in this way?

                Cm3.png

                • 5. Re: what voltage wave can I see at Cmod?
                  BragadeeshV_41

                  Yes, you are right. When a finger is placed, the charge taken from cmod is more and the time to restore back the voltage to vref is more. This makes the comparator output ON for more time.

                   

                  Regards,

                  Bragadeesh

                  • 6. Re: what voltage wave can I see at Cmod?
                    befic_2639911

                    Hi,Bragadeesh:

                        I am still a little confused about your answer.

                        1)  According to an64846, 4045s was embeded with a Fourth-Generation Capsense,which has a self-Cap range from 5pf to 200pf.

                           it is not 5pf-45pf.

                        2)  The Cmod voltage rises with the same charging Idac until it is beyond Vref. In this phase,△T = Cm*△U/Idac。bigger Cp ,leads to a bigger △U,bigger △T。so time for Cmod to restore back the voltage to vref   is more.

                        but if Cp is big enough,Cmod voltage may have no opptunity to come back to Vref again. because a bigger Cp makes a smaller Requivalent .while  Idac is not changed,so we get a smaller balancing voltage in Cmod. it will be less than Vref forever just as my figure above shows .

                        3) Do you mean comparator will output ON to enable count when Cmod voltage is less than Vref(a negative input of comparator)?

                    • 7. Re: what voltage wave can I see at Cmod?
                      BragadeeshV_41

                      Hi befic_2639911,

                       

                      1. I just wanted to use 5 to 45 pF as an example. As you rightly pointed, fourth gen Capsense can support 5 to 200 pF in manual tuning.

                      2. Yes, you are right.

                      2. When the voltage at Cmod is less than Vref, the comparator output logic, will make the IDAC to be enabled to re-establish the voltage at cmod to Vref again.

                       

                      Please let me know in case you have further clarifications. We are happy to help

                       

                      Regards,

                      Bragadeesh

                      • 8. Re: what voltage wave can I see at Cmod?
                        befic_2639911

                        Hi,Bragadeesh:

                             Thank you very much. Hope you would not be tired of my questions.

                             First, I think IDAC auto-calibration is in the chip startup phase to remove the environment influence.

                             Second,according to 4000s TRM,    “ In the self-capacitance mode, before the beginning of the sensor scanning, the voltage on the CMOD capacitor should be initialized to ”VREF. The CMOD capacitor is approximately initialized to VREF during the coarse initialization phase and accurately initialized to VREF during the sample initialization phase. ”  

                            This means,to re-establish cmod voltage to Vref by adjusting IDAC is in sample initialization phase.

                            But as the following figure shows(blue signal is voltage Cmod.3 buttons scanning and Sld2 is touched by Oscilloscope's Probe with 11pf),it seems different. I think Vref is 2V, When sensor was touched,Cmod voltage droped to almost 1.5V. Cx voltage(green signal) is changing with sensor clock frequency .  I think this is in sample initialization and sample normal phase.

                             Now why does not Cmod voltage  come back to Vref?

                            c1.png

                        c2.png

                           

                           The real problem is how to get raw count in 4045s. I guess it maybe like this. it can explain the figure.

                        the triangular wave is in sample initialization phase. Cmod is charging in A-B and is discharging in B-C. A ,B,C is very near Vref.

                        F-E is longer than A-D, but it is not used to distinguish finger presence or not, because we don't know actual time of A.

                        P-D and K-E can be used to do it.  The longer voltage Cmod is below Vref, the longer counter is enable.

                           c3.png

                        • 9. Re: what voltage wave can I see at Cmod?
                          BragadeeshV_41

                          Hi befic_2639911,

                           

                          Thanks for the update.

                           

                          1. Correct, during IDAC auto - calibration, the IDAC values are set to achieve the target calibrate percent during chip startup/ when Capsense_Start() is called.

                          2. IDAC value is not changed during sample initialization process. It is turned ON/ OFF to establish the voltage at cmod to vref based on CSDCOMP output logic.

                          3. What is sld2?

                          4. Vref is set based on VDDA. It is not fixed to 1.2 V like in 3rd gen Capsense. What is your VDDA?

                          5. Can you please mark the exact point in your graph where the sensor was touched?

                          6. What is Cx voltage?

                          7. why does not Cmod voltage  come back to Vref? --> Please mark in the graph.

                          8. The raw count is not obtained in the sample initialization phase. The sample initialization phase performs dummy scans to bring cmod to Vref. It is during the sample normal phase that the raw counts are considered.

                           

                          Regards,

                          Bragadeesh

                          • 10. Re: what voltage wave can I see at Cmod?
                            befic_2639911

                            Hi,Bragadeesh:

                                 Thanks for your answer.

                                 Some response to your answer.

                                 to (2): In "002-10129_PSoC_4000S_Family_PSoC_4_Architecture_Technical_Reference_Manual_TRM",it says:"The Cmod capacitor is approximately initialized to Vref during the coarse initialization phase and accurately initialized to Vref during the sample initialization phase". In coarse initialization phase, sense clock does not work. so cmod voltage charges to approximately vref.In sample initialization phase,sense clock works.so cmod voltage tunes to vref accurately.in fact cmod voltage fluctuates near vref. If  it is a little smaller than vref, it makes comparator output keeps low. there would be no count enable signal.So i think cmod voltage should fluctuate around vref, while leads to the IDAC turns ON/OFF again and again. That is what i guess. I don't know how it works,how it counts.there is no professional document to explain it.

                                 to (3):  I changed CE210709 to be with 3 buttons in a SLD(CSD) widget. sld2 should be SLD_Sns2,the 3rd button sensor.

                                 to (4):  I am using CY8CKIT-145 board.VDDA is 4.75V.so,Vref shoudl be fixed to  2.0V,isn't is? it is just as same as the above wave figure shows.

                                 to (5): In fact,a led signal is a finger touch trigger,but it is not in the following figure.

                            to (6): Cx shoud be Cp or Cp+Cf or Cs,the sensor capacitor .In this figure,red box shows,when oscillator prober(11pf)  touchs sensor,Cp begins to discharge and charge  with a given frequency.

                            to (7): from above figure, I think Vref is 2.0V.while sensor is touched,voltage cmod drops below vref ,which will led to a 2046 raw counts.(it seems the counter  overflowed.but why keeps at 2046? why not 2047?).

                            to (8): just as (2). still in a puzzle about the work and count princeple.

                            • 11. Re: what voltage wave can I see at Cmod?
                              BragadeeshV_41

                              Hi befic_2639911,

                               

                              1. In coarse initialization phase, sense clock does not work. so cmod voltage charges to approximately vref.In sample initialization phase,sense clock works.so cmod voltage tunes to vref accurately.in fact cmod voltage fluctuates near vref. If  it is a little smaller than vref, it makes comparator output keeps low. there would be no count enable signal.So i think cmod voltage should fluctuate around vref, while leads to the IDAC turns ON/OFF again and againThat is what i guess. I don't know how it works,how it counts.there is no professional document to explain it.

                               

                              Your understanding is correct. That is how our CapSense works. The right document to understand how Capsense works is Getting started with CapSense and PSoC 4 and PSoC 6 CapSense design guide. Unfortunately we may not be able to explain the hardware completely due to proprietary information. But please let us know if you have specific questions. We can answer it based on your question.

                              Getting started with CapSense https://www.cypress.com/file/41076/download

                              PSoC 4 and PSoC 6 CapSense design guide https://www.cypress.com/file/46081/download

                               

                              2.  I am using CY8CKIT-145 board.VDDA is 4.75V.so,Vref shoudl be fixed to  2.0V,isn't is? it is just as same as the above wave figure shows.

                               

                              Yes, you are right.

                               

                              3. from above figure, I think Vref is 2.0V.while sensor is touched,voltage cmod drops below vref ,which will led to a 2046 raw counts.(it seems the counter  overflowed.but why keeps at 2046? why not 2047?).

                               

                              Can you please check CapSense performance with typical finger touch capacitance - 0.1 pF to 1 pF? Regarding the saturation point, I can confirm this again and let you know. Ideally it should be 2047 only. Also, can you try reading the raw count value and see if it actually 2047 or 2046? Maybe it is an I2C mismatch.

                               

                              Regards,

                              Bragadeesh

                              • 12. Re: what voltage wave can I see at Cmod?
                                befic_2639911

                                Hi,Bragadeesh:

                                     Thank you very much.

                                     In fact ,cypress public document is useful . It can be slightly more explanation without property exposure. I think introduction to CSA is more clear.

                                    why do customer choose 4045s for example? Maybe not only  a market reason,but also a  technology requirement. because cypress supplies a fully researched and developed product from csa,csd_v1 , csd_v2 to other csd. The princeple document and user's experiments result are accordant. It will convince those who has reservations.

                                    BTW:I set a breakpoint in CE210709,to see the raw count. it is 0x7fe,just 2046,as same as senser tuner shows. That also confused me.

                                    

                                • 13. Re: what voltage wave can I see at Cmod?
                                  BragadeeshV_41

                                  Hi befic_2639911,

                                   

                                  Thank you for your valuable feedback. We will try to get our document updated as you suggested. I'm not sure why the counter reads a lesser value. I'll get back to you on that.

                                   

                                  Regards,

                                  Bragadeesh

                                  • 14. Re: what voltage wave can I see at Cmod?
                                    befic_2639911

                                    Hi,Bragadeesh:

                                        Hope to see your new documents as soon as possible.

                                         AN64846 is obviously a good index document and a initial document for user. I still insist that a historical development processs of capsense and corresponding chip series could be introduced. In addtion,structure and working principle of various capsense can be told in document. in fact,there are some explaination in other documents though they are not very clear. it is easy for user to mistake CSD_V2 working as CSA working.

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